Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MPC5604P
Rev. 5, 11/2009
MPC5604P
144 LQFP
20 mm x 20 mm
MPC5604P Microcontroller
Data Sheet
• High performance 64 MHz e200z0h CPU
– 32-bit Power Architecture Book E CPU
– Variable Length Encoding (VLE)
• Available memory
– As much as 512 KB on-chip code flash memory with
additional 64 KB for EEPROM emulation (data flash),
with ECC, with erase/program controller
– As much as 40 KB on-chip RAM with ECC
• Fail safe protection
– Programmable watchdog timer
– Junction temperature sensor
– Non-maskable interrupt
– Fault collection unit
• Nexus L2+ interface
• Interrupts
– 16 priority level controller
• 16-channel eDMA controller
• General purpose I/Os
– Individually programmable as input, output or special
function
• Two general purpose eTimer units
– Six timers each with up/down count capabilities
– 16-bit resolution, cascadable counters
– Quadrature decode with rotation direction flag
– Double buffer input capture and output compare
• Communications interfaces
– Two LINFlex channels (LIN 2.1)
– Four DSPI channels with automatic chip select
generation
– FlexCAN interface (2.0B Active) with 32 message
objects
– Safety port based on FlexCAN with 32 message objects
and up to 7.5 Mbit/s capability; usable as second CAN
when not used as safety port
– FlexRay™ module (V2.1) with dual or single channel,
32 message objects and up to 10 Mbit/s
100 LQFP
14 mm_x_14 mm
• Two 10-bit A/D converters
– Two × 15 input channels, four channels shared among
the two A/D converters
– Conversion time < 1 µs including sampling time at full
precision
– Programmable Cross Triggering Unit (CTU)
– Four analog watchdogs with interrupt capability
• On-chip CAN/UART/FlexRay Bootstrap loader with Boot
Assist Module (BAM)
• FlexPWM unit
– Eight complementary or independent outputs with ADC
synchronization signals
– Polarity control, reload unit
– Integrated configurable dead time unit and inverter fault
input pins
– 16-bit resolution, up to 2 × f
CPU
– Lockable configuration
– Clock generation
– 4–40 MHz main oscillator
– 16 MHz internal RC oscillator
– Software controlled FMPLL capable of speeds as fast as
64 MHz
• Voltage supply
– 3.3 V or 5 V supply for I/Os and ADC
– On-chip single supply voltage regulator with external
ballast transistor
– Operating temperature ranges: –40 to 125 °C or
–40 to 105 °C
This document contains information on a product under development. Freescale reserves the
right to change or discontinue this product without notice.
© Freescale Semiconductor, Inc., 2008, 2009. All rights reserved.
Preliminary—Subject to Change Without Notice
Table of Contents
1
2
Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.1 Device comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1.2 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Package pinouts and signal descriptions . . . . . . . . . . . . . . . . .6
2.1 Package pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2.2 Pin descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
2.2.1 Power supply and reference voltage pins . . . . . .8
2.2.2 System Pins. . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
2.2.3 Pin Muxing . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . .23
3.2 Recommended operating conditions . . . . . . . . . . . . . .26
3.3 Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . .29
3.3.1 General notes for specifications at maximum
junction temperature . . . . . . . . . . . . . . . . . . . . .30
3.4 Electromagnetic interference (EMI) characteristics. . . .32
3.5 Electrostatic discharge (ESD) characteristics . . . . . . . .32
3.6 Power management electrical characteristics. . . . . . . .33
3.6.1 Voltage regulator electrical characteristics . . . .33
3.6.2 Voltage monitor electrical characteristics. . . . . .35
3.7 Power up/down sequencing . . . . . . . . . . . . . . . . . . . . .36
3.8 DC electrical characteristics . . . . . . . . . . . . . . . . . . . . .39
3.8.1 NVUSRO register . . . . . . . . . . . . . . . . . . . . . . .39
3.8.2 DC electrical characteristics (5 V) . . . . . . . . . . .39
3.8.3 DC Electrical characteristics (3.3 V) . . . . . . . . .41
3.8.4 I/O pad current specification . . . . . . . . . . . . . . 44
Temperature sensor electrical characteristics . . . . . . . 48
Main oscillator electrical characteristics . . . . . . . . . . . 48
FMPLL electrical characteristics . . . . . . . . . . . . . . . . . 49
16 MHz RC oscillator electrical characteristics . . . . . . 50
Analog-to-digital converter (ADC) electrical characteristics
51
3.13.1 Input impedance and ADC accuracy . . . . . . . . 51
3.13.2 ADC conversion characteristics . . . . . . . . . . . . 56
3.14 Flash memory electrical characteristics . . . . . . . . . . . 57
3.15 AC Specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
3.15.1 Pad AC Specifications . . . . . . . . . . . . . . . . . . . 58
3.16 AC Timing Characteristics . . . . . . . . . . . . . . . . . . . . . . 59
3.16.1 RESET Pin Characteristics . . . . . . . . . . . . . . . 59
3.16.2 IEEE 1149.1 interface timing . . . . . . . . . . . . . . 61
3.16.3 Nexus timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 64
3.16.4 External interrupt timing (IRQ pin) . . . . . . . . . . 66
3.16.5 DSPI timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Package characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
4.1 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . 73
4.1.1 144 LQFP mechanical outline drawing. . . . . . . 73
4.1.2 100 LQFP Mechanical Outline Drawing . . . . . . 75
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
3.9
3.10
3.11
3.12
3.13
3
4
5
6
MPC5604P Microcontroller Data Sheet, Rev. 5
2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
1
Overview
This document provides electrical specifications, pin assignments, and package diagrams for the MPC5604P series of
microcontroller units (MCUs). For functional characteristics, refer to the
MPC5604P Microcontroller Reference Manual.
MPC5604P microcontrollers are members of a new family of next generation microcontrollers built on the Power
Architecture™. This document describes the features of the family and options available within the family members, and
highlights important electrical and physical characteristics of the devices.
The MPC5604P family of 32-bit microcontrollers is the latest achievement in integrated automotive application controllers. It
belongs to an expanding range of automotive-focused products designed to address electrical hydraulic power steering (EHPS),
electric power steering (EPS) and airbag applications. The advanced and cost-efficient host processor core of the MPC5604P
automotive controller family complies with the Power Architecture embedded category, which is 100 percent user-mode
compatible with the original PowerPC user instruction set architecture (UISA). It operates at speeds of up to 64 MHz and offers
high performance processing optimized for low power consumption. It capitalizes on the available development infrastructure
of current Power Architecture devices and is supported with software drivers, operating systems and configuration code to assist
with users implementations.
1.1
Device comparison
Table 1. MPC5604P device comparison
Feature
Code Flash memory (with ECC)
Data Flash / EE (with ECC)
RAM (with ECC)
Processor core
Instruction set
CPU performance
FMPLL (frequency-modulated phase-locked loop) modules
INTC (interrupt controller) channels
PIT (periodic interrupt timer)
Enhanced DMA (direct memory access) channels
FlexRay
FlexCAN (controller area network)
Safety port
FCU (fault collection unit)
CTU (cross triggering unit)
eTimer channels
FlexPWM (pulse-width modulation) channels
Analog-to-digital converters (ADC)
LINFlex modules
DSPI (deserial serial peripheral interface) modules
MPC5603P
384 KB
64 KB
36 KB
32-bit e200z0h
VLE
0–64 MHz
2
147
1 (includes four 32-bit timers)
16
Yes
1
2
2,3
Yes (via second FlexCAN module)
Yes
Yes
2×6
8
Two (10-bit, 16-channel)
2
4
MPC5604P
512 KB
64 KB
40 KB
Table 1
provides a summary of different members of the MPC5604P family and their features to enable a comparison among
the family members and an understanding of the range of functionality offered within this family.
MPC5604P Microcontroller Data Sheet, Rev. 5
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
3
Table 1. MPC5604P device comparison (continued)
Feature
CRC (cyclic redundancy check) unit
Junction temperature sensor
JTAG interface
Nexus port controller (NPC)
Supply
Digital power supply
4
Analog power supply
Internal RC oscillator
External crystal oscillator
Packages
Temperature
Standard ambient temperature
Extended ambient temperature
5
1
2
MPC5603P
Yes
Yes
Yes
Yes (Level 2+)
MPC5604P
3.3 V or 5 V single supply with external transistor
3.3 V or 5 V
16 MHz
4–40 MHz
100 LQFP
144 LQFP
–40 to 125 °C
–40 to 145 °C
32 message buffers, dual-channel.
Each FlexCAN module has 32 message buffers.
3
One FlexCAN module can act as a Safety Port with a bit rate as high as 7.5 Mbit/s.
4
3.3 V range and 5 V range correspond to different orderable parts.
5
Thermally enhanced 100-pin and 144-pin LQFP packages are under analysis to support an extended ambient
temperature range of –40 to 145 °C. The packages are not yet available.
MPC5604P Microcontroller Data Sheet, Rev. 5
4
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
1.2
Block diagram
Figure 1
shows a top-level block diagram of the MPC5604P MCU.
1.2 V Regulator
Control
XOSC
16 MHz
RC Oscillator
FMPLL_0
(System)
FMPLL_1
(FlexRay, MotCtrl)
JTAG
Nexus Port
Controller
eDMA2 ¥
16 channels
Master
Instruction (32-bit)
Master
Data (32-bit)
Master
FlexRay
Master
Integer
Execution
Unit
e200z0 Core
32-bit
General
Purpose
Registers
Special
Purpose
Registers
Instruction
Unit
Branch
Prediction
Unit
Exception
Handler
Variable
Length
Encoded
Instructions
Load/Store
Unit
Interrupt
Controller
Crossbar Switch (XBAR, AMBA 2.0 v6 AHB)
Slave
Slave
Slave
Boot
Assist
Module
System
Integration
Unit-Lite
ECSM
Peripheral Bridge
Junc. Temp. Sensor
STM
Flash memory
(with ECC)
SRAM
(with ECC)
SWT
PIT
4 ch.
11
4 11
CTUCross Triggering Unit
DSPIDeserial Serial Peripheral Interface
ECSMError Correction Status Module
eTimerEnhanced Timer
FlexCANFlexible Controller Area Network
FlexPWMFlexible Pulse Width Modulation
FMPLLFrequency-Modulated Phase-Locked Loop
LINFlexSerial Communication Interface (LIN support)
PITPeriodic Interrupt Timer
SRAMStatic Random-Access Memory
STMSystem Timer Module
SWTSoftware Watchdog Timer
Figure 1. MPC5604P block diagram
MPC5604P Microcontroller Data Sheet, Rev. 5
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
5
Fault Collection
Unit
2¥
eTimer (6 ch)
1.2 V Rail Vreg
Safety Port
FlexPWM
FlexCAN
2¥
LINFlex
4¥
DSPI
2¥
ADC
CTU
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