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TMPR28051: 产品描述TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device; 文件大小992KB，共90页; 制造商Agere System(LSI Logic)

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TMPR28051概述

TMPR28051 STS-1/AU-3 (STM-0) Mapper Device Advisory for Version 5 of the Device

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Advisory

August 5, 1999

TMPR28051 STS-1/AU-3 (STM-0) Mapper

Device Advisory for Version 5 of the Device

RA-1. Reset Bit

The software reset bit (bit 0) of register 0x00 is not functional.

RA-2. Transmit Path AIS Insert Bit

The TXPAISINS bit (bit 5) of register 0x01 produces both AIS-P and AIS-L.

RA-3. STS-1 Loss of Pointer Mask Bit

The STS1LOPMSK bit (bit 2) of register 0x04 masks both STS1LOP and STS1LOF.

RA-4. STS-1 Loss of Frame Mask Bit

The STS1LOFMSK bit (bit 1) of register 0x04 is not functional.

RA-5. VTLABCOM and VTRFIRDICOM Interrupt Bits

Occasionally, it might require multiple reads to clear the composite interrupt bits VTLABCOM (bit 2 of

Error Insertion (EI)

EI-1. DS1/E1 Alarm Indication Signal

The device does not insert DS1/E1 AIS towards the STS-1 if there is an LOC condition in the incoming DS1/E1

signal.

EI-2. LOC Condition in E1 Loopback Mode

In the absence of an input clock, the device detects an LOC condition and generates TU-AIS upstream, even if the

loopback path is selected (the loopback signal is overwritten by TU-AIS).

TMPR28051 STS-1/AU-3 (STM-0) Mapper

Device Advisory for Version 5 of the Device

Advisory

August 5, 1999

Error Insertion (EI)

(continued)

EI-3. False S-BIP, L-BIP, and P-BIP Error Insertion

The device transmits S-BIP, L-BIP, and P-BIP errors when configured for automatic insertion of REI, and certain

STS-1 error conditions such as LOS, LOF, LOP-P, S-BIP, L-BIP, and P-BIP are inserted.

VT Alarms (VT)

VT-1. VT Path Payload Label Mismatch

The device reports PLM-V when it detects three consecutive consistent new values for the VT label. This is in com-

pliance with G.783 Section 2.2.2.7 and T1.231 Section 8.1.3.5.2.4.2 specifications, but is not compliant with

GR-253 Section 6.2.1.1.8.C.

VT-2. Failure in the Detection of VT Loss of Pointer Defects

The device also apparently fails to detect an LOP-V defect when it continuously receives a VT pointer word of

6C68 (i.e., a value indicating a VT1.5 with an offset of 104 bytes, versus a maximum valid offset of 103 bytes). In

this case, the device inserts the required DS1 AIS downstream, but does not subsequently declare an LOP-V fail-

ure (nonconformance to GR 253, R6-71).

VT-3. Inappropriate Termination of VT Loss of Pointer Defect Condition

After the device has detected an LOP-V defect, it inappropriately terminates that defect upon receiving two pointer

words containing the same value as the previous valid pointer. According to GR 253, an LOP-V defect must not be

terminated unless a valid pointer is received in three consecutive VT superframes (nonconformance to GR 253,

R6-75).

VT-4. Inappropriate Termination of VT Alarm Indication Signal Defect Condition

After the device has detected an AIS-V defect, it inappropriately terminates that defect upon receiving two pointer

words containing the same value as the previous valid pointer and without a set NDF (e.g., with the N bits set to

0110). According to GR 253, an AIS-V defect must not be terminated unless a normal valid pointer is received in

three consecutive VT superframes, or a valid pointer with a set NDF is received in one VT superframe (nonconfor-

mance to GR 253, R6-183).

For additional information, contact your Microelectronics Group Account Manager or the following:

http://www.lucent.com/micro

INTERNET:

docmaster@micro.lucent.com

E-MAIL:

N. AMERICA: Microelectronics Group, Lucent Technologies Inc., 555 Union Boulevard, Room 30L-15P-BA, Allentown, PA 18103

1-800-372-2447,

FAX 610-712-4106 (In CANADA:

1-800-553-2448,

FAX 610-712-4106)

ASIA PACIFIC: Microelectronics Group, Lucent Technologies Singapore Pte. Ltd., 77 Science Park Drive, #03-18 Cintech III, Singapore 118256

Tel. (65) 778 8833,

FAX (65) 777 7495

CHINA:

Microelectronics Group, Lucent Technologies (China) Co., Ltd., A-F2, 23/F, Zao Fong Universe Building, 1800 Zhong Shan Xi Road, Shanghai

200233 P. R. China

Tel. (86) 21 6440 0468, ext. 316,

FAX (86) 21 6440 0652

JAPAN:

Microelectronics Group, Lucent Technologies Japan Ltd., 7-18, Higashi-Gotanda 2-chome, Shinagawa-ku, Tokyo 141, Japan

Tel. (81) 3 5421 1600,

FAX (81) 3 5421 1700

EUROPE:

Data Requests: MICROELECTRONICS GROUP DATALINE:

Tel. (44) 7000 582 368,

FAX (44) 1189 328 148

Technical Inquiries: GERMANY:

(49) 89 95086 0

(Munich), UNITED KINGDOM:

(44) 1344 865 900

(Ascot),

FRANCE:

(33) 1 40 83 68 00

(Paris), SWEDEN:

(46) 8 594 607 00

(Stockholm), FINLAND:

(358) 9 4354 2800

(Helsinki),

ITALY:

(39) 02 6608131

(Milan), SPAIN:

(34) 1 807 1441

(Madrid)

Lucent Technologies Inc. reserves the right to make changes to the product(s) or information contained herein without notice. No liability is assumed as a result of their use or application. No

rights under any patent accompany the sale of any such product(s) or information.

August 5, 1999

AY99-025SONT (Must accompany DS99-068SONT)

TMPR28051 STS-1/AU-3 (STM-0) Mapper

Device Advisory for Version 2 of the Device

Advisory, Rev. 2

August 5, 1999

Error Insertion (EI)

(continued)

EI-3. False S-BIP, L-BIP, and P-BIP Error Insertion

The device transmits S-BIP, L-BIP, and P-BIP errors when configured for automatic insertion of REI, and certain

STS-1 error conditions such as LOS, LOF, LOP-P, S-BIP, L-BIP, and P-BIP are inserted.

EI-4. Forcing AIS Condition

In order to force AIS using the VTDROP bits, a value of 0x1D must be programmed for DS1 AIS, and a value of

0x1E must be programmed for E1 AIS.

VT Mapping (VT)

VT-1. VT Path Payload Label Mismatch

The device reports PLM-V when it detects three consecutive consistent new values for the VT label. This is in com-

pliance with G.783 Section 2.2.2.7 and T1.231 Section 8.1.3.5.2.4.2 specifications, but is not compliant with

GR-253 Section 6.2.1.1.8.C.

VT-2. Failure in the Detection of VT Loss of Pointer Defects

The device fails to detect an LOP-V defect or insert the required DS1/E1 AIS downstream when it receives VT

pointer words with the N bits continuously set to 1001 (i.e., with a continuously set NDF).

The device also apparently fails to detect an LOP-V defect when it continuously receives a VT pointer word of

6C68 (i.e., a value indicating a VT1.5 with an offset of 104 bytes, versus a maximum valid offset of 103 bytes). In

this case, the device inserts the required DS1 AIS downstream, but does not subsequently declare an LOP-V

failure (nonconformance to GR 253, R6-71).

VT-3. Inappropriate Termination of VT Loss of Pointer Defect Condition

After the device has detected an LOP-V defect, it inappropriately terminates that defect upon receiving two pointer

words containing the same value as the previous valid pointer. According to GR 253, an LOP-V defect must not be

terminated unless a valid pointer is received in three consecutive VT superframes (nonconformance to GR 253,

R6-75).

VT-4. Inappropriate Termination of VT Alarm Indication Signal Defect Condition

After the device has detected an AIS-V defect, it inappropriately terminates that defect upon receiving two pointer

words containing the same value as the previous valid pointer and without a set NDF (e.g., with the N bits set to

0110). According to GR 253, an AIS-V defect must not be terminated unless a normal valid pointer is received in

three consecutive VT superframes, or a valid pointer with a set NDF is received in one VT superframe (nonconfor-

mance to GR 253, R6-183).

Lucent Technologies Inc.

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