NCP1288
Fixed Frequency Current
Mode Controller for Flyback
Converters
The NCP1288 is a new generation of the NCP12xx fixed−frequency
current−mode controllers featuring a high−voltage startup current,
pin−to−pin compatible with the previous generation.
Due to its proprietary Soft−Skip™ mode combined with frequency
foldback, the controller exhibits excellent efficiency in light load
condition while still achieving very low standby power consumption.
This Soft−Skip feature also dramatically reduces the risk of acoustic
noise, which enables the use of inexpensive transformers and
capacitors in the clamping network.
Internal frequency jittering, ramp compensation, and a versatile
latch input make this controller an excellent candidate for converters
where ruggedness and components cost are the key constraints.
In addition, the controller includes a new high voltage circuitry that
combines a startup current source and a brown−out / line OVP detector
able to sense the input voltage either from the rectified ac line or the dc
filtered bulk voltage.
Finally, due to a careful design, the precision of critical parameters
is well controlled over the entire temperature range (−40°C to
+125°C), enabling easier design and increased safety (e.g.
$5%
for
the peak current limit,
$7%
for the oscillator).
Features
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MARKING
DIAGRAM
8
SOIC−7
CASE 751U
88Xff
ALYWX
G
1
88Xff = Specific Device Code
X = A or B
ff = 65, 00, or 33
A
= Assembly Location
L
= Wafer Lot
Y
= Year
W
= Work Week
G
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 38 of this data sheet.
•
Timer−Based Overload Protections with Auto−
•
•
•
•
•
•
•
•
Recovery (Option B) or Latched (Option A) Operation
High−V
oltage Current Source with Built−in Brown−out
and Line Overvoltage Protections
Fixed−Frequency Current−Mode Operation with
Built−in Ramp Compensation
Frequency Jittering for a Reduced EMI Signature
Adjustable Overpower Compensation
Latch−off Input for Severe Fault Conditions, with
Direct Connection of an NTC for Overtemperature
Protection (OTP)
Protection Against Winding Short−Circuit
Frequency Foldback transitioning into Soft−Skip for
Improved Performance in Standby
65 kHz Oscillator (100 kHz and 133 kHz Versions
Available Upon Request)
•
•
•
•
•
•
V
CC
Operation up to 28 V
Increased Precision on Critical Parameters
±1.0
A Peak Drive Capability
4.0 ms Soft−Start
Internal Thermal Shutdown with Hysteresis
These Devices are Pb−Free, Halogen Free/BFR Free
and are RoHS Compliant*
ac−dc Adapters for Notebooks, LCD, and Printers
Offline Battery Chargers
Consumer Electronic Power Supplies
Auxiliary/Housekeeping Power Supplies
Typical Applications
•
•
•
•
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
©
Semiconductor Components Industries, LLC, 2011
July, 2011
−
Rev. 3
1
Publication Order Number:
NCP1288/D
NCP1288
1
Latch
HV
8
2
FB
3
CS
VCC
6
4
GND
DRV
5
Figure 1. Pinout
TYPICAL APPLICATION EXAMPLE
VIN
(dc)
VOUT
LATCH
FB
CS
GND
NCP1288
HV
VCC
DRV
Figure 2. Typical Application
PIN FUNCTION DESCRIPTION
Pin N5
1
2
3
4
5
6
8
Pin Name
LATCH
FB
CS
GND
DRV
V
CC
HV
Function
Latch−off Input
Feedback
Current Sense
–
Drive Output
V
CC
Input
High−Voltage Pin
Pin Description
Pull the pin up or down to latch−off the controller. An internal current source allows
the direct connection of an NTC for over temperature detection
A pull−down optocoupler controls the output regulation.
Senses the primary current for current−mode operation, and provides a mean for
overpower compensation adjustment.
IC ground
Drives an external MOSFET
This supply pin accepts up to 28 Vdc
Connects to the bulk capacitor or the rectified AC line to perform the functions of
start−up current source and brown−out / line overvoltage detections
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2
NCP1288
SIMPLIFIED INTERNAL BLOCK SCHEMATIC
Brown−out
blanking
HV stop
−
+
HV
Dual HV
start−up
current source
VCC
FB
Sawtooth
Stop Foldback
Oscillator
IC Start
IC Stop
Clamp
S
+
−
Q
R
DRV
GND
UVLO
ILIMIT
DMAX
+
+
−
Protection
Mode
release
Autorecovery
protection
mode only
timer
Fault
Brown−out
Reset
HV stop
Latch
TSD
V
DD
I
NTC
I
NTC
+
BO
OVM
HV sample
HV dc
+
−
t
Latch(OVP)
V
OVP
Latch
1 kW
Vclamp
+
−
+
V
OTP
t
Latch(OTP)
blanking
TSD
S
Q
R
Latch
Reset
UVLO
VDD
IC Start
TSD
Soft−start
end
Brown−out
FB
Reset
TSD HV current
Reset
V
CC
UVLO
management
VDD
Start
Soft−skip ramp
−
+
Vskip
Reset
VDD
+
t
SSKIP
R
FB(up)
Skip
FB
K
FB
slope
comp.
HV sample
+
−
PWM
Jitter
Skip
Soft−start
+
−
Soft−start Start
ramp
Reset
End
Soft−start end
blanking
V to I
I
OPC
= 0.5m x
(V
HV
−125)
V
FB(OPC)
CS
t
LEB
blanking
t
BCS
S
Q
R
Fault Flag
PWM
+
−
+
t
SSTART
D
CMAX
D
MAX
+
V
ILIM
I
LIMIT
IC stop
V
CS(stop)
t
fault
timer
t
autorec
Figure 3. Simplified Internal Block Schematic
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3
NCP1288
MAXIMUM RATINGS
Rating
Supply Pin (pin 6) (Note 1)
Voltage range
Current range
High Voltage Pin (pin 8) (Note 1)
Voltage range
Current range
Driver Pin (pin 5) (Note 1)
Voltage range
Current range
All other pins (Note 1)
Voltage range
Current range
Thermal Resistance
Junction−to−Air, low conductivity PCB (Note 2)
Junction−to−Air, medium conductivity PCB (Note 3)
Junction−to−Air, high conductivity PCB (Note 4)
Temperature Range
Operating Junction Temperature
Storage Temperature Range
ESD Capability
Human Body Model (HBM) per JEDEC standard JESD22, Method A114E (All pins except HV)
Machine Model (MM) per JEDEC standard JESD22, Method A115A
Symbol
V
CCMAX
I
CCMAX
V
HVMAX
I
HVMAX
V
DRVMAX
I
DRVMAX
V
MAX
I
MAX
R
qJA
Value
–0.3 to 28
$30
–0.3 to 500
$20
–0.3 to 20
$1500
–0.3 to 10
$10
162
147
125
−40
to +150
−60
to +150
2000
200
Unit
V
mA
V
mA
V
mA
V
mA
°C/W
T
STRGMAX
T
JMAX
°C
V
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. This device contains latch−up protection and exceeds 100 mA per JEDEC Standard JESD78
2. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 100 mm
2
of 1 oz copper traces and heat spreading area. As specified
for a JEDEC 51−1 conductivity test PCB. Test conditions were under natural convection or zero air flow.
3. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 100 mm
2
of 2 oz copper traces and heat spreading area. As specified
for a JEDEC 51−2 conductivity test PCB. Test conditions were under natural convection or zero air flow.
4. As mounted on a 80 x 100 x 1.5 mm FR4 substrate with a single layer of 650 mm
2
of 1 oz copper traces and heat spreading area. As specified
for a JEDEC 51−3 conductivity test PCB. Test conditions were under natural convection or zero air flow.
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4
NCP1288
ELECTRICAL CHARACTERISTICS
(For typical values T
J
= 25°C, for min/max values T
J
=
−40°C
to +125°C, V
HV
= 120 V,
V
CC
= 11 V unless otherwise noted)
Characteristics
HIGH VOLTAGE CURRENT SOURCE
Minimum voltage for current source operation
Current flowing out of V
CC
pin @ V
HV
= 60 V
Off−state leakage current
SUPPLY
Turn−on threshold level, V
CC
going up
HV current source stop threshold
UVLO and HV current source restart threshold
Hysteresis between V
CC(on)
and V
CC(min)
Blanking duration on V
CC(min)
and V
CC(off)
detection
V
CC
decreasing level at which the internal logic resets
V
CC
level for I
START1
to I
START2
transition
Internal current consumption (Note 5)
DRV open, V
FB
= 3 V
C
drv
= 1 nF, V
FB
= 3 V
Off mode (skip or before
startup)
Fault mode (fault or latch)
BROWN−OUT AND LINE OVERVOLTAGE
Brown−out threshold voltage
Timer duration for line cycle drop−out
Overvoltage threshold
Blanking duration on line overvoltage detection
OSCILLATOR
Oscillator frequency
Maximum duty ratio
Frequency jittering amplitude, in percentage of F
OSC
Frequency jittering modulation frequency
OUTPUT DRIVER
Rise time, 10% to 90% of V
CC
Fall time, 90% to 10% of V
CC
Current Capability
V
CC
= V
CC(min)
+ 0.2 V,
C
DRV
= 1 nF
V
CC
= V
CC(min)
+ 0.2 V,
C
DRV
= 1 nF
V
CC
= V
CC(min)
+ 0.2 V,
C
DRV
= 1 nF
DRV high, V
DRV
= 0 V
DRV low, V
DRV
= V
CC
V
CC
= V
CCmax
– 0.2 V, DRV
high
V
CC
= V
CC(min)
+ 0.2 V,
R
DRV
= 33 kW, DRV high
t
rise
t
fall
−
−
22
22
34
34
ns
ns
mA
I
DRV(source)
I
DRV(sink)
V
DRV(clamp)
V
DRV(drop)
−
−
11
−
1000
1000
13.5
−
−
−
16
1
V
V
Guaranteed by design
Guaranteed by design
f
OSC
D
MAX
A
jitter
F
jitter
60
75
$4
85
65
80
$6
125
70
85
$8
165
kHz
%
%
Hz
V
HV
going up
V
HV
going down
V
HV
going up
V
HV
going down
V
HV(start)
V
HV(stop)
t
HV
V
HV(OV1)
V
HV(OV2)
t
OV(blank)
104
97
43
400
395
−
112
105
61
430
425
250
120
113
79
460
455
−
V
ms
V
ms
Guaranteed by design
V
CC(on)
V
CC(min)
V
CC(HYS)
t
UVLO(blank)
V
CC(reset)
V
CC(inhibit)
ICC1
ICC2
ICC3
ICC4
15.0
9.5
5.0
7
4.0
0.4
2.0
2.3
0.9
0.4
16.0
10.5
−
10
5.2
0.65
2.5
3.3
1.2
0.7
17.0
11.5
−
13
6.5
0.9
3.0
4.3
1.5
1.0
V
V
V
ms
V
V
mA
V
CC
= 0 V
V
CC
= V
CC(on)
−
0.5 V
V
HV
= 500 V
V
HV(min)
I
start1
I
start2
I
start(off)
−
0.2
4
−
−
0.5
8
25
60
0.8
12
50
V
mA
mA
Test Condition
Symbol
Min
Typ
Max
Unit
Clamping Voltage (Maximum Gate Voltage)
High−State Voltage Drop
5. Internal supply current only, current in FB pin not included (current flowing through GND pin only).
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