LTC6802-2
Multicell Addressable
Battery Stack Monitor
FeaTures
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DescripTion
The LTC
®
6802-2 is a complete battery monitoring IC that
includes a 12-bit ADC, a precision voltage reference, a
high voltage input multiplexer and a serial interface. Each
LTC6802-2 can measure 12 series connected battery cells,
with a total input voltage up to 60V. The voltage on all 12
input channels can be measured within 13ms.
Many LTC6802-2 devices can be stacked to measure the
voltage of each cell in a long battery string. Each LTC6802-2
has an individually addressable serial interface, allowing
up to 16 LTC6802-2 devices to interface to one control
processor and operate simultaneously.
To minimize power, the LTC6802-2 offers a measure mode
to monitor each cell for overvoltage and undervoltage
conditions. A standby mode is also provided to reduce
supply current to 50µA.
Each cell input has an associated MOSFET switch that can
discharge any overcharged cell.
The related LTC6802-1 offers a serial interface that allows
the serial ports of multiple LTC6802-1 devices to be daisy
chained without opto-couplers or isolators.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
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Measures Up to 12 Li-Ion Cells in Series (60V Max)
Stackable Architecture Enables Monitoring High
Voltage Battery Stacks
Individually Addressable with 4-Bit Address
0.25% Maximum Total Measurement Error
13ms to Measure All Cells in a System
Cell Balancing:
On-Chip Passive Cell Balancing Switches
Provision for Off-Chip Passive Balancing
Two Thermistor Inputs Plus Onboard
Temperature Sensor
1MHz Serial Interface with Packet Error Checking
High EMI Immunity
Delta-Sigma Converter With Built-In Noise Filter
Open-Wire Connection Fault Detection
Low Power Modes
44-Lead SSOP Package
applicaTions
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Electric and Hybrid Electric Vehicles
High Power Portable Equipment
Backup Battery Systems
High Voltage Data Acquisition Systems
Typical applicaTion
NEXT 12-CELL
PACK ABOVE
V
+
LTC6802-2
DIE TEMP
MEASUREMENT ERROR (%)
0.30
0.25
0.20
0.15
0.10
0.05
0
–0.05
–0.10
–0.15
–0.20
–0.25
–0.30
–50
68022 TA01a
Measurement Error Over
Extended Temperature
7 REPRESENTATIVE UNITS
V
S
= 43.2V
CELL VOLTAGE 3.6V
+
SERIAL DATA
REGISTERS
AND
CONTROL
MUX
4-BIT
ADDRESS
12-CELL
BATTERY
STRING
+
+
V
–
EXTERNAL
TEMP
12-BIT
∆∑ ADC
NEXT 12-CELL
PACK BELOW
100k NTC
VOLTAGE
REFERENCE
–25
0
25
50
75
TEMPERATURE (°C)
100
125
68022 TA01b
100k
68022fa
LTC6802-2
absoluTe MaxiMuM raTings
(Note 1)
pin conFiguraTion
TOP VIEW
V
+
C12
S12
C11
S11
C10
S10
C9
S9
1
2
3
4
5
6
7
8
9
44 CSBI
43 SDO
42 SDI
41 SCKI
40 A3
39 A2
38 A1
37 A0
36 GPIO2
35 GPIO1
34 WDTB
33 MMB
32 TOS
31 V
REG
30 V
REF
29 V
TEMP2
28 V
TEMP1
27 NC
26 V
–
25 S1
24 C1
23 S2
Total Supply Voltage (V
+
to V
–
) .................................60V
Input Voltage (Relative to V
–
)
C1 ............................................................ –0.3V to 9V
C12 ..........................................V
+
– 0.6V to V
+
+ 0.3V
Cn (Note 5) ......................... –0.3V to Min (9 •
n,
60V)
Sn (Note 5) ......................... –0.3V to Min (9 •
n,
60V)
All Other Pins ........................................... –0.3V to 7V
Voltage Between Inputs
Cn to Cn – 1 ............................................. –0.3V to 9V
Sn to Cn – 1 ............................................. –0.3V to 9V
C12 to C8 ............................................... –0.3V to 25V
C8 to C4 ................................................. –0.3V to 25V
C4 to V
–
................................................. –0.3V to 25V
Operating Temperature Range.................. –40°C to 85°C
Specified Temperature Range .................. –40°C to 85°C
Junction Temperature ........................................... 150°C
Storage Temperature Range................... –65°C to 150°C
*n = 1 to 12
C8 10
S8 11
C7 12
S7 13
C6 14
S6 15
C5 16
S5 17
C4 18
S4 19
C3 20
S3 21
C2 22
G PACKAGE
44-LEAD PLASTIC SSOP
T
JMAX
= 150°C,
θ
JA
= 70°C/W
orDer inForMaTion
LEAD FREE FINISH
LTC6802IG-2#PBF
TAPE AND REEL
LTC6802IG-2#TRPBF
PART MARKING
LTC6802G-2
PACKAGE DESCRIPTION
44-Lead Plastic SSOP
TEMPERATURE RANGE
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
68022fa
LTC6802-2
elecTrical characTerisTics
SYMBOL PARAMETER
DC Specifications
V
ACC
Measurement Resolution
ADC Offset Voltage
ADC Gain Error
V
ERR
Total Measurement Error
Quantization of the ADC
(Note 2)
(Note 2)
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 43.2V, V
–
= 0V, unless otherwise noted.
CONDITIONS
MIN
TYP
1.5
–0.5
–0.12
–0.22
0.8
0.5
0.12
0.22
MAX
UNITS
mV/Bit
mV
%
%
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
mV
V
5•
n
15
10
5
4.200
2.300
3
l
(Note 4)
V
CELL
= 0V
V
CELL
= 2.3V
V
CELL
= 2.3V
V
CELL
= 3.6V
V
CELL
= 3.6V
V
CELL
= 4.2V
V
CELL
= 4.2V
V
CELL
= 4.6V
V
TEMP
= 2.3V
V
TEMP
= 3.6V
V
TEMP
= 4.2V
Full-Scale Voltage Range
l
l
l
l
l
l
–2.8
–5.1
–4.3
–7.9
–5
–9.2
–5.1
–7.9
–9.2
3.7
1.8
1.2
0
4.182
2.290
3.020
3.015
±8
2.8
5.1
4.3
7.9
5
9.2
5.1
7.9
9.2
V
CELL
V
CM
Cell Voltage Range
5
l
l
l
l
l
l
Common Mode Voltage Range Measured Range of Inputs Cn for <0.25% Gain Error,
n
= 3 to 11
Relative to V
–
Range of Input C3 for <1% Gain Error
Range of Input C2 for <0.25% Gain Error
Range of Input C1 for <0.25% Gain Error
Overvoltage (OV) Detection Level
Undervoltage (UV) Detection Level
Die Temperature Measurement Error
Programmed for 4.2V
Programmed for 2.3V
Error in Measurement at 125°C
R
LOAD
= 100k to V
–
V
V
V
V
V
V
°C
V
V
ppm/°C
ppm
ppm/√kHr
4.218
2.310
3.110
3.115
V
REF
Reference Pin Voltage
Reference Voltage Temperature
Coefficient
Reference Voltage Thermal Hysteresis
Reference Voltage Long-Term Drift
3.065
3.065
8
25°C to 85°C and 25°C to –40°C
10 < V
+
< 50, No Load
I
LOAD
= 4mA
V
ERR
Specifications Met
Timing Specifications Met
In/Out of Pins C1 Through C12
When Measuring Cells
When Not Measuring Cells
l
l
l
l
l
l
100
60
4.5
4.1
5
10
4
–10
5.0
4.8
8
50
50
10
1.1
1.2
5.5
V
REG
Regulator Pin Voltage
Regulator Pin Short-Circuit Current Limit
V
V
mA
V
V
µA
nA
mA
mA
V
S
I
B
I
S
I
M
Supply Voltage, V
+
Relative to V
–
Input Bias Current
1
0.8
Supply Current, Active
Supply Current, Monitor Mode
Current Into the V
+
Pin When Measuring Voltages with
l
the ADC
Average Current Into the V
+
Pin While Monitoring for
UV and OV Conditions
Continuous Monitoring (CDC = 2)
Monitor Every 130ms (CDC = 5)
Monitor Every 500ms (CDC = 6)
Monitor Every 2 Seconds (CDC = 7)
Current Into the V
+
Pin When Idle
All Serial Port Pins at Logic ‘1’
l
800
225
150
100
37.5
32.5
62.5
82.5
87.5
µA
µA
µA
µA
µA
µA
I
QS
Supply Current, Idle
68022fa
LTC6802-2
elecTrical characTerisTics
SYMBOL PARAMETER
Discharge Switch On-Resistance
Temperature Range
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
Timing Specifications
t
CYCLE
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
Measurement Cycle Time
Time Required to Measure 11 or 12 Cells
Time Required to Measure Up to 10 Cells
Time Required to Measure 1 Cell
l
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
+
= 43.2V, V
–
= 0V, unless otherwise noted.
CONDITIONS
V
CELL
> 3V (Note 3)
l
l
MIN
–40
TYP
10
145
5
MAX
20
85
UNITS
Ω
°C
°C
°C
11
9.2
1
10
250
400
400
400
100
100
13
11
1.2
16
13.5
1.5
ms
ms
ms
ns
ns
ns
ns
ns
ns
ns
SDI Valid to SCKI Rising Setup
SDI Valid to SCKI Rising Hold
SCKI Low
SCKI High
CSBI Pulse Width
SCKI Rising to CSBI Rising
CSBI Falling to SCKI Rising
SCKI Falling to SDO Valid
Clock Frequency
Watchdog Timer Time-Out Period
250
1
1
2
0.8
0.3
2.5
ns
MHz
s
V
V
V
Digital I/O Specifications
V
IH
V
IL
V
OL
Digital Voltage Input High
Digital Voltage Input Low
Digital Voltage Output Low
Sinking 500µA
l
l
l
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The ADC specifications are guaranteed by the total measurement
error (V
ERR
) specification.
Note 3:
Due to the contact resistance of the production tester, this
specification is tested to relaxed limits. The 20Ω limit is guaranteed by
design.
Note 4:
V
CELL
refers to the voltage applied across the following pin
combinations: Cn to Cn – 1 for
n
= 2 to 12, C1 to V
–
. V
TEMP
refers to the
voltage applied from V
TEMP1
or V
TEMP2
to V
–
Note 5:
These absolute maximum ratings apply provided that the voltage
between inputs do not exceed their absolute maximum ratings.
68022fa
LTC6802-2
Typical perForMance characTerisTics
Cell Measurement Total
Unadjusted Error
10
TOTAL UNADJUSTED ERROR (mV)
8
6
4
2
0
–2
–4
–6
–8
–10
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
CELL VOLTAGE (V)
68022 G09
Cell Measurement Total
Unadjusted Error vs Input
Resistance
10
TOTAL UNADJUSTED ERROR (mV)
0
–10
–20
–30
–40
R
S
= 1k
R
S
= 2k
–50
R
S
= 5k
R
S
= 10k
–60
R
S
IN SERIES WITH Cn AND Cn – 1
–70 NO EXTERNAL CAPACITANCE ON
Cn AND Cn – 1
–80
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
CELL VOLTAGE (V)
68022 G10
Measurement Gain Error
Hysteresis
25
T
A
= 85°C TO 25°C
T
A
= –40°C
T
A
= 25°C
T
A
= 85°C
T
A
= 125°C
20
NUMBER OF UNITS
15
10
5
0
–250 –200 –150 –100 –50 0 50 100 150 200
CHANGE IN GAIN ERROR (ppm)
68022 G20
Measurement Gain Error
Hysteresis
20
18
16
NUMBER OF UNITS
REJECTION (db)
14
12
10
8
6
4
2
0
–250 –200 –150 –100 –50 0 50 100 150 200
CHANGE IN GAIN ERROR (ppm)
68022 G21
Cell Measurement Common Mode
Rejection
V
CM(IN)
= 5V
P-P
72dB REJECTION
–10 CORRESPONDS TO
LESS THAN 1 BIT
–20 AT ADC OUTPUT
–30
–40
–50
–60
–70
10
100
1k
10k 100k
FREQUENCY (Hz)
1M
10M
68022 G15
ADC Normal Mode Rejection vs
Frequency
0
–10
–20
REJECTION (db)
–30
–40
–50
–60
–70
10
100
1k
10k
FREQUENCY (Hz)
100k
68022 G14
T
A
= –45°C TO 25°C
0
ADC INL
2.0
1.5
1.0
DNL (BITS)
INL (BITS)
0.5
0
–0.5
–1.0
–1.5
–2.0
0
1
2
3
INPUT (V)
4
5
68022 G05
ADC DNL
1.0
0.8
C PIN BIAS CURRENT (nA)
0.6
0.4
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
1
3
2
INPUT (V)
4
5
68022 G06
Cell Input Bias Current in Standby
50
40
30
20
C12
10
0
C2 TO C11
–10
–40 –20
0
20 40 60 80
TEMPERATURE (°C)
100 120
68022 G03
C1
68022fa
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