S12CPUV2
Reference Manual
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the most current. Your printed copy may be an earlier revision. To verify you have the latest information
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The following revision history table summarizes changes contained in this document.
Revision History
Revision
Number
3.0
4.0
Date
April, 2002
March, 2006
Summary of Changes
Incorporated information covering HCS12 Family of 16-bit MCUs throughout the book.
Reformatted to Freescale publication standards.
Corrected mistake in ANDCC/TAP descriptions (Instruction Glossary).
Corrected mistake in MEM description (Instruction Glossary).
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© Freescale Semiconductor, Inc., 2005. All rights reserved.
S12CPUV2 Reference Manual, Rev. 4.0
Freescale Semiconductor
3
Reference Manual — S12CPUV2
List of Sections
Table of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Section 1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Section 2. Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Section 3. Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Section 4. Instruction Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Section 5. Instruction Set Overview . . . . . . . . . . . . . . . . . . . . . . . 55
Section 6. Instruction Glossary . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
Section 7. Exception Processing. . . . . . . . . . . . . . . . . . . . . . . . . 311
Section 8. Instruction Queue . . . . . . . . . . . . . . . . . . . . . . . . . . . 323
Section 9. Fuzzy Logic Support. . . . . . . . . . . . . . . . . . . . . . . . . . 337
Appendix A. Instruction Reference . . . . . . . . . . . . . . . . . . . . . . . 375
Appendix B. M68HC11 to CPU12 Upgrade Path. . . . . . . . . . . . . 403
Appendix C. High-Level Language Support . . . . . . . . . . . . . . . . 425
Index . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 433
S12CPUV2 Reference Manual, Rev. 4.0
Freescale Semiconductor
5
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