LTC4361-1/LTC4361-2
Overvoltage/Overcurrent
Protection Controller
FEATURES
n
n
n
n
n
n
n
n
n
n
n
n
n
DESCRIPTION
The LTC
®
4361 overvoltage/overcurrent protection control-
ler safeguards 2.5V to 5.5V systems from input supply
overvoltage. It is designed for portable devices with
multiple power supply options including wall adaptors,
car battery adaptors and USB ports.
The LTC4361 controls an external N-channel MOSFET in
series with the input power supply. During overvoltage
transients, the LTC4361 turns off the MOSFET within
1μs, isolating downstream components from the input
supply. Inductive cable transients are absorbed by the
MOSFET and load capacitance. In most applications, the
LTC4361 provides protection from transients up to 80V
without requiring transient voltage suppressors or other
external components.
The LTC4361 has a delayed start-up and adjustable dV/dt
ramp-up for inrush current limiting. A
PWRGD
pin provides
power good monitoring for V
IN
. The LTC4361 features a soft
shutdown controlled by the
ON
pin and drives an optional
external P-channel MOSFET for negative voltage protection.
Following an overvoltage condition, the LTC4361 automati-
cally restarts with a start-up delay. After an overcurrent
fault, the LTC4361-1 remains off while the LTC4361-2
automatically restarts after a 130ms start-up delay.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
ThinSOT, Hot Swap, No R
SENSE
and PowerPath are trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners.
2.5V to 5.5V Operation
Overvoltage Protection Up to 80V
No Input Capacitor or TVS Required for Most
Applications
2% Accurate 5.8V Overvoltage Threshold
10% Accurate 50mV Overcurrent Circuit Breaker
<1μs Overvoltage Turn-Off, Gentle Shutdown
Controls N-Channel MOSFET
Adjustable Power-Up dV/dt Limits Inrush Current
Reverse Voltage Protection
Power Good Output
Low Current Shutdown
Latchoff (LTC4361-1) or Auto-Retry (LTC4361-2)
After Overcurrent
Available in 8-Lead ThinSOT™ and 8-Lead
(2mm
×
2mm) DFN Packages
APPLICATIONS
n
n
n
n
n
USB Protection
Handheld Computers
Cell/Smart Phones
MP3/MP4 Players
Digital Cameras
TYPICAL APPLICATION
Protection from Overvoltage and Overcurrent
V
IN
5V
0.025Ω
Si1470DH
C
OUT
GATE
SENSE OUT
IN
LTC4361
ON
PWRGD
GND
436112 TA01a
Output Protected from Overvoltage at Input
V
IN
V
OUT
5V
1.5A
V
OUT
V
IN
, V
OUT
5V/DIV
V
GATE
10V/DIV
0.5μs/DIV
Si1470DH
C
OUT
= 10μF
436112 TA01b
436112f
1
LTC4361-1/LTC4361-2
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Bias Supply Voltage (IN) ............................ –0.3V to 85V
Input Voltages
SENSE ................................................... –0.3V to 85V
OUT,
ON
................................................... –0.3V to 9V
Output Voltages
PWRGD
.................................................... –0.3V to 9V
GATE (Note 3) ........................................ –0.3V to 15V
GATEP.................................................... –0.3V to 85V
IN to GATEP ........................................... –0.3V to 10V
Operating Temperature Range
LTC4361C ................................................ 0°C to 70°C
LTC4361I .............................................–40°C to 85°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
TSOT................................................................. 300°C
PIN CONFIGURATION
TOP VIEW
TOP VIEW
ON
1
OUT 2
GATEP 3
GND 4
8
PWRGD
7 GATE
6 SENSE
5 IN
GND 1
GATEP 2
OUT 3
ON
4
9
8 IN
7 SENSE
6 GATE
5
PWRGD
TS8 PACKAGE
8-LEAD PLASTIC TSOT-23
T
JMAX
= 125°C,
θ
JA
= 195°C/W
DC PACKAGE
8-LEAD (2mm 2mm) PLASTIC DFN
T
JMAX
= 125°C,
θ
JA
= 102°C/W
EXPOSED PAD (PIN 9) IS GND, CONNECTION OPTIONAL
ORDER INFORMATION
Lead Free Finish
TAPE AND REEL (MINI)
LTC4361CTS8-1#TRMPBF
LTC4361CTS8-2#TRMPBF
LTC4361ITS8-1#TRMPBF
LTC4361ITS8-2#TRMPBF
LTC4361CDC-1#TRMPBF
LTC4361CDC-2#TRMPBF
LTC4361IDC-1#TRMPBF
LTC4361IDC-2#TRMPBF
TAPE AND REEL
LTC4361CTS8-1#TRPBF
LTC4361CTS8-2#TRPBF
LTC4361ITS8-1#TRPBF
LTC4361ITS8-2#TRPBF
LTC4361CDC-1#TRPBF
LTC4361CDC-2#TRPBF
LTC4361IDC-1#TRPBF
LTC4361IDC-2#TRPBF
PART MARKING*
LTDWN
LTFMN
LTDWN
LTFMN
LDWP
LFMP
LDWP
LFMP
PACKAGE DESCRIPTION
8-Lead Plastic TSOT-23
8-Lead Plastic TSOT-23
8-Lead Plastic TSOT-23
8-Lead Plastic TSOT-23
8-Lead (2mm
×
2mm) Plastic DFN
8-Lead (2mm
×
2mm) Plastic DFN
8-Lead (2mm
×
2mm) Plastic DFN
8-Lead (2mm
×
2mm) Plastic DFN
TEMPERATURE RANGE
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
0°C to 70°C
0°C to 70°C
–40°C to 85°C
–40°C to 85°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
436112f
2
LTC4361-1/LTC4361-2
ELECTRICAL CHARACTERISTICS
SYMBOL
Supplies
V
IN
V
IN(UVL)
I
IN
Thresholds
V
IN(OV)
ΔV
OV
ΔV
OC
ΔV
GATE
V
GATE(TH)
I
GATE(UP)
V
GATE(UP)
I
GATE(FST)
I
GATE(DN)
Input Pins
I
OUT(IN)
V
ON(TH)
I
ON
Output Pins
V
GATEP(CLP)
R
GATEP
V
PWRGD(OL)
R
PWRGD
Delay
t
ON
t
OFF
t
PWRGD
t
ON(OFF)
GATE On Delay
GATE Off Propagation Delay
PWRGD
Delay
ON
High to GATE Off
V
IN
High to I
GATE
= –5μA
V
IN
= Step 5V to 6.5V
V
IN
– V
SENSE
= Step 0mV to 100mV
V
IN
= Step 5V to 6.5V
V
GATE
> V
GATE(TH)
to
PWRGD
Low
V
ON
= Step 0V to 2.5V
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 5V, V
ON
= 0V, unless otherwise noted.
PARAMETER
Input Voltage Range
Input Undervoltage Lockout
Input Supply Current
V
IN
Rising
V
ON
= 0V
V
ON
= 2.5V
IN Pin Overvoltage Threshold
Overvoltage Hysteresis
Overcurrent Threshold
External N-Channel MOSFET Gate Drive
(V
GATE
– V
OUT
)
V
IN
– V
SENSE
2.5V ≤ V
IN
< 3V, I
GATE
= –1μA
3V ≤ V
IN
< 5.5V, I
GATE
= –1μA
V
IN
Rising
CONDITIONS
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
l
MIN
2.5
1.8
TYP
MAX
80
UNITS
V
V
μA
μA
V
mV
mV
V
V
V
V
μA
V/ms
mA
μA
μA
μA
V
μA
V
MΩ
V
kΩ
ms
μs
μs
μs
ms
μs
2.1
220
1.5
2.45
400
10
5.916
200
55
6
7.9
6.8
7.8
–15
4.5
60
80
20
±3
1.5
10
7.5
3.2
0.4
800
200
1
20
1
100
5
5.684
25
45
3.5
4.5
5.7
6.7
–5
1.5
15
10
5
0.4
2.5
5
0.8
250
50
5
25
5.8
100
50
4.5
6
6.3
7.2
–10
3
30
40
10
0
5
5.8
2
0.23
500
130
0.25
10
0.25
65
2
External Gate Drive
GATE High Threshold for
PWRGD
Status V
IN
= 3.3V
V
IN
= 5V
GATE Pull-Up Current
GATE Ramp-Up
GATE Pull-Down Current
GATE Pull-Down Current
OUT Input Current
ON
Input Threshold
ON
Pull-Down Current
IN to GATEP Clamp Voltage
GATEP Resistive Pull-Down
PWRGD
Output Low Voltage
PWRGD
Pull-Up Resistance to OUT
V
GATEP
= 3V
V
IN
= 5V, I
PWRGD
= 3mA
V
IN
= 6.5V, V
PWRGD
= 1V
V
ON
= 2.5V
V
GATE
= 1V
V
GATE
= 1V to 7V
Fast Turn-Off, V
IN
= 6V, V
GATE
= 9V
V
ON
= 2.5V, V
GATE
= 9V
V
OUT
= 5V, V
ON
= 0V
V
OUT
= 5V, V
ON
= 2.5V
l
l
l
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All currents into device pins are positive; all currents out of device
pins are negative. All voltages are referenced to GND unless otherwise
specified.
Note 3:
An internal clamp limits V
GATE
to a minimum of 4.5V above V
OUT
.
Driving this pin to voltages beyond this clamp may damage the device.
436112f
3
LTC4361-1/LTC4361-2
TYPICAL PERFORMANCE CHARACTERISTICS
T
A
= 25°C, V
IN
= 5V, V
ON
= 0V, unless otherwise noted.
Input Supply Current
vs Input Voltage
10000
8
7
1000
V
ON
= 0V
I
IN
(μA)
100
V
ON
= 2.5V
10
V
GATE
(V)
6
5
4
3
2
1
1
0.1
1
10
V
IN
(V)
100
436112 G01
GATE Drive vs GATE Current
40
GATE Fast Pull-Down Current
vs Temperature
V
IN
= 6V
V
GATE
= 9V
35
I
GATE(FST)
(mA)
V
IN
= 5V
V
IN
= 3V
30
V
IN
= 2.5V
25
0
0
2
4
6
I
GATE
(μA)
436112 G02
8
10
12
20
–50
–25
50
0
25
TEMPERATURE (°C)
75
100
436112 G03
PWRGD
Voltage
vs
PWRGD
Current
500
8
7
400
V
PWRGD(OL)
(mV)
GATE Off Propagation Delay
vs Overdrive
V
IN
= STEP 5V TO (V
IN(OV)
+ V
OVDRV
)
12
11
GATE Voltage and GATE High
Threshold (for
PWRGD
Status)
vs Input Voltage
V
IN
= V
OUT
V
GATE
V
GATE
/VG
GATE(TH)
(V)
10
9
8
7
6
5
V
GATE(TH)
6
t
OFF
(μs)
5
4
3
2
1
300
200
100
0
0
1
3
I
PWRGD
(mA)
2
4
5
436112 G04
0
0
0.5
1
1.5
V
OVDRV
(V)
2
2.5
436012 G05
4
2.5
3
3.5
4
4.5
V
IN
(V)
5
5.5
6
436112 G06
Normal Start-Up Sequence
V
IN
5V/DIV
V
OUT
5V/DIV
V
IN
5V/DIV
V
OUT
5V/DIV
GATE Slow Ramp-Up
V
ON
5V/DIV
Entering Sleep Mode
V
OUT
5V/DIV
V
GATE
10V/DIV
V
GATE
10V/DIV
V
GATE
10V/DIV
I
CABLE
0.5A/DIV
20ms/DIV
FIGURE 5 CIRCUIT
R
IN
= 150mΩ, L
IN
= 0.7μH
R
SENSE
= 25mΩ
LOAD = 10Ω, C
OUT
= 10μF
436112 G07
I
CABLE
0.5A/DIV
436112 G08
I
CABLE
0.5A/DIV
1ms/DIV
FIGURE 5 CIRCUIT
R
IN
= 150mΩ, L
IN
= 0.7μH
R
SENSE
= 25mΩ
LOAD = 10Ω, C
OUT
= 10μF
50μs/DIV
FIGURE 5 CIRCUIT
R
IN
= 150mΩ, L
IN
= 0.7μH
R
SENSE
= 25mΩ
LOAD = 10Ω, C
OUT
= 10μF
436112 G09
436112f
4
LTC4361-1/LTC4361-2
PIN FUNCTIONS
Exposed Pad (DFN):
Ground. Connection to PCB is
optional.
GATE:
Gate Drive for External N-Channel MOSFET. An
internal charge pump provides a 10μA pull-up current
to charge the gate of the external N-channel MOSFET. An
additional ramp circuit limits the GATE ramp rate when
turning on to 3V/ms. For slower ramp rates, connect an
external capacitor from GATE to GND. An internal clamp
limits GATE to 6V above the OUT pin voltage. An internal
GATE high comparator controls the
PWRGD
pin.
GATEP:
Gate Drive for External P-Channel MOSFET. GATEP
connects to the gate of an optional external P-channel
MOSFET to protect against negative voltages at IN. This
pin is internally clamped to 5.8V below V
IN
. An internal
2M resistor connects this pin to ground. Connect to IN
if not used.
GND:
Device Ground.
IN:
Supply Voltage Input. Connect this pin to the input
power supply. This pin has an overvoltage threshold of
5.8V. After an overvoltage event, this pin must fall below
V
IN(OV)
–
ΔV
OV
to release the overvoltage lockout. Dur-
ing lockout, GATE is held low and the
PWRGD
pull-down
releases.
ON:
On Control Input. A logic low at
ON
enables the
LTC4361. A logic high at
ON
activates a low current pull-
down at the GATE pin and causes the LTC4361 to enter
a low current sleep mode. An internal 5μA current pulls
ON
down to ground. Connect to ground or leave open if
unused.
OUT:
Output Voltage Sense Input for GATE Clamp. Connect
to the source of the external N-channel MOSFET to sense
the output voltage for GATE to OUT clamp.
PWRGD:
Power Good Status. Open-drain output with
internal 500k resistive pull-up to OUT. Pulls low 65ms
after GATE ramps above V
GATE(TH)
.
SENSE:
Current Sense Input. Connect a sense resistor
between IN and SENSE. An overcurrent protection circuit
turns off the N-channel MOSFET when the voltage across
the sense resistor exceeds 50mV for more than 10μs.
436112f
5
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
