Maximum Junction Temperature .......................... 125°C
Operating Junction Temperature Range (Note 2)
E-, I-Grades ....................................... –40°C to 125°C
MP-Grade .......................................... –55°C to 125°C
Storage Temperature Range .................. –65°C to 125°C
CHOLD4 10
FB 11
GND 12
GN PACKAGE
24-LEAD NARROW PLASTIC SSOP
T
JMAX
= 150°C,
θ
JA
= 85°C/W
ORDER INFORMATION
LEAD FREE FINISH
LT4180EGN#PBF
LT4180IGN#PBF
LT4180MPGN#PBF
TAPE AND REEL
LT4180EGN#TRPBF
LT4180IGN#TRPBF
LT4180MPGN#TRPBF
PART MARKING*
LT4180GN
LT4180GN
LT4180GN
PACKAGE DESCRIPTION
24-Lead Narrow Plastic SSOP
24-Lead Narrow Plastic SSOP
24-Lead Narrow Plastic SSOP
TEMPERATURE RANGE
–40°C to 125°C
–40°C to 125°C
–55°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
SYMBOL
V
IN
IV
IN
V
REF
I
LIM
V
OL
V
INTVCC
PARAMETER
Operating Supply Voltage
Input Quiescent Current
Reference Voltage
Open-Drain Current Limit
DRAIN Low Voltage
LDO Regulator Output Voltage
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C, V
IN
= SENSE = 5V, unless otherwise noted.
CONDITIONS
l
MIN
3.10
l
l
TYP
1
MAX
50
2
1.233
1.245
15
0.3
UNITS
V
mA
V
V
mA
V
V
ROSC Open, COSC Open, SENSE = V
IN
V
CHOLD2
= V
CHOLD3
= 1.2V, Measured at C
HOLD4
During Track ΔV
OUT
Clock Phase
With FB = V
REF
+ 200mV, OSC Stopped with Voltage
Feedback Loop Closed
V
IN
= 3V
V
IN
= 5V
1.209
1.197
5
1.221
1.221
10
3.15
4180fp
2
LT4180
ELECTRICAL CHARACTERISTICS
SYMBOL
V
INTVCC
V
OV
V
OHYST
V
RUN
V
RHYST
I
FB
V
OS
PARAMETER
LDO Regulator Output Voltage in
Dropout
Overvoltage Threshold
Overvoltage Input Hysteresis
Run Threshold
Run Input Hysteresis
Input Bias Current
Current Amplifier Offset Voltage
V
IN
= 3.5V
V
IN
= 5V
V
IN
= 48V
A
VL
/A
VH
, A
V
Measured in V/V
Measured at SENSE with SENSE = V
IN
Measured at CHOLD1 with V
CHOLD1
= 1.2V
Measured at CHOLD2 with V
CHOLD2
= 1.2V
Measured at CHOLD3 with V
CHOLD3
= 1.2V
Measured at CHOLD4 with V
CHOLD4
= 1.5V,
V
CHOLD2
= 1V, V
CHOLD3
= 1.2V
Measured at CHOLD4 with V
CHOLD4
= 1.5V,
V
CHOLD2
= 1.4V, V
CHOLD3
= 1.2V
I
SC
I
LKG1
I
LKG2
I
LKG3
I
LKG4
f
OSC
g
mFB
g
mIAMP
Soft-Correct Current
Track/Hold Leakage Current
Track/Hold Leakage Current
Track/Hold Leakage Current
Track/Hold Leakage Current
Oscillator Frequency
Voltage Error Amplifier
Transconductance
Current Amplifier Transconductance
Measured at CHOLD4
Measured at CHOLD1 with V
CHOLD1
= 1.2V
Measured at CHOLD2 with V
CHOLD2
= 1.2V
Measured at CHOLD3 with V
CHOLD3
= 1.2V
Measured at CHOLD4 with V
CHOLD4
= 1.2V
R
OSC
= 20k, C
OSC
= 1nF
Measured from FB to COMP V
COMP
= 2V,
,
OSC Stopped with Voltage Feedback Loop Closed
Measured from SENSE to COMP V
COMP
= 2V,
,
OSC Stopped with Current Feedback Loop Closed
170
200
110
750
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C, V
IN
= SENSE = 5V, unless otherwise noted.
CONDITIONS
V
IN
= 2.5V
Rising
V
RISING
– V
FALLING
Falling
V
RISING
– V
FALLING
20
–0.2
–4
–3
–4
0.891
–1
9.7
10
±60
±25
±25
10
–200
±1.5
±1
±1
±1
±1
230
0.9
20
1.21
80
0.2
4
3
4
0.909
1
10.3
μA
V/V
μA
μA
μA
μA
μA
μA
μA
μA
μA
μA
kHz
μmho
μmho
MIN
2.2
1.21
80
TYP
MAX
UNITS
V
V
mV
V
mV
μA
mV
mV
mV
A
V(RATIO)
I
SENSE
A
V
I
CHOLD1
I
CHOLD2
I
CHOLD3
I
CHOLD4
Current Amplifier Gain Ratio
Current Amplifier Input Bias Current
ΔV
FB
Amplifier Gain
Track/Hold Charging Current
Track/Hold Charging Current
Track/Hold Charging Current
Track/Hold Charging Current
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2.
The LT4180E is guaranteed to meet performance specifications
from 0°C to 125°C junction temperature. Specifications over the –40°C
to 125°C operating junction temperature range are assured by design
characterization and correlation with statistical process controls. The
LT4180I is guaranteed over the full –40°C to 125°C operating junction
temperature range. The LT4180MP is guaranteed over the full –55°C to
125°C operating junction temperature range.
Note 3.
Positive current is defined as flowing into a pin.
4180fp
3
LT4180
TYPICAL PERFORMANCE CHARACTERISTICS
V
REF
vs Temperature
1.2215
3.165
3.160
3.155
INTV
CC
(V)
V
REF
(V)
1.2205
3.150
3.145
1.2195
3.140
3.135
–55 –35 –15
FREQUENCY (kHz)
INTV
CC
vs Temperature
204.0
Oscillator Frequency
vs Temperature
R
OSC
= 20k
C
OSC
= 1nF
1.2210
203.5
203.0
1.2200
202.5
202.0
1.2190
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
4108 G01
5 25 45 65 85 105 125
TEMPERATURE (°C)
4108 G02
201.5
–55 –35 –15
5 25 45 65 85 105 125
TEMPERATURE (°C)
4108 G03
I
DRAIN
vs V
DRAIN
14
12
10
I
DRAIN
(mA)
8
6
4
2
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9
V
DRAIN
(V)
1
4180 G04
Normal Timing
500mV/DIV
C
HOLD1
WITH 15k
PULL-DOWN
500mV/DIV
C
HOLD1
WITH 15k
PULL-DOWN
Spread Spectrum Timing
2V/DIV
OSC
4180 G05
2V/DIV
OSC
4180 G06
5μs/DIV
TRIGGERED ON C
HOLD1
1μs/DIV
TRIGGERED ON OSC
V
LOAD
vs V
WIRE
5.00
4.99
4.98
4.97
V
LOAD
(V)
4.96
4.95
4.94
4.93
4.92
4.91
0
0.5
1
1.5
V
WIRING
(V)
4180 G07
Load Step in 12V Linear Application
R
WIRE
= 4Ω
C
L
= 100μF
V
SENSE
2V/DIV
V
LOAD
2V/DIV
V
OUT
2V/DIV
V
LOAD
2V/DIV
I
LOAD
I
LOAD
200mA/DIV
2ms/DIV
200mA TO 700mA LOAD TRANSIENT
100μF LOAD CAP
2
2.5
3
4180 G08
Load Step in Buck Application
1.2A
200mA
4180 G09
500mA/DIV
5ms/DIV
4180fp
4
LT4180
PIN FUNCTIONS
INTVCC (Pin 1):
The LDO Output. A low ESR ceramic
capacitor provides decoupling and output compensation.
1μF or more should be used.
DRAIN (Pin 2):
Open-Drain of the Output Transistor. This
pin drives either the LED in an opto-isolator, or pulls down
on the regulator control pin.
COMP (Pin 3):
Gate of the Output Transistor. This pin allows
additional compensation. It must be left open if unused.
CHOLD1 (Pin 4):
Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
GUARD2 (Pin 5):
Guard Ring Drive for CHOLD2.
CHOLD2 (Pin 6):
Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
GUARD3 (Pin 7):
Guard Ring Drive for CHOLD3.
CHOLD3 (Pin 8):
Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
GUARD4 (Pin 9):
Guard Ring Drive for CHOLD4.
CHOLD4 (Pin 10):
Connects to track/hold amplifier hold
capacitor. The other end of this capacitor should be Kelvin
connected to GND.
FB (Pin 11):
Receives the feedback voltage from an exter-
nal resistor divider across the main output. An (optional)
capacitor to ground may be added to eliminate high
frequency noise. The time constant for this RC network
should be no greater than 0.1 times the dither frequency.
For example, with f
DITHER
= 1kHz,
τ
= 0.1ms.
GND (Pin 12):
Ground.
COSC (Pin 13):
Oscillator Timing Capacitor. Oscillator fre-
quency is set by this capacitor and ROSC. For best accuracy,
the minimum recommended capacitance is 100pF
.
ROSC (Pin 14):
Oscillator Timing Resistor. Oscillator
frequency is set by this resistor and COSC.
OSC (Pin 15):
Oscillator Output. This output may be
used to synchronize the switching regulator to the
Virtual Remote Sense. This is a high current output capable
of driving opto-isolators. Other isolation methods may
also be used with this output.
DIV2 (Pin 16):
Dither Division Ratio Programming Pin.
DIV1 (Pin 17):
Dither Division Ratio Programming Pin.
DIV0 (Pin 18):
Dither Division Ratio Programming Pin.
Use the following table to program the dither division
ratio (f
OSC
/f
DITHER
)
Table 1. Programming the Dither Division Ratio (f
OSC
/f
DITHER
)
DIV2
0
0
0
0
1
1
1
1
DIV1
0
0
1
1
0
0
1
1
DIV0
0
1
0
1
0
1
0
1
DIVISION RATIO
8
16
32
64
128
256
512
1024
For example, f
DITHER
= f
OSC
/128 with DIV2 = 1 and DIV1
= DIV0 = 0.
SPREAD (Pin 19):
Spread Spectrum Enable Input. Dither
phasing is pseudo-randomly adjusted when SPREAD is
tied high.
OV (Pin 20):
Overvoltage Comparator Input. This prevents
line drop correction when wiring drops would cause ex-
cessive switching power supply output voltage. Set OV
so V
REG(MAX)
≤ 1.50V
LOAD
.
RUN (Pin 21):
The RUN pin provides the user with an accu-
rate means for sensing the input voltage and programming
the start-up threshold for the line drop corrector.
SENSE (Pin 22):
Current Sense Input. This input connects
to the current sense resistor. Kelvin connect to R
SENSE
.
V
PP
(Pin 23):
Connect this pin to INTVCC.
V
IN
(Pin 24):
Main Supply Pin. V
IN
must be locally bypassed
to ground. Kelvin connect the current sense resistor to
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