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NLU1GT126

产品描述Non-Inverting 3-State Buffer, TTL Level LSTTL-Compatible Inputs
文件大小97KB,共8页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
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NLU1GT126概述

Non-Inverting 3-State Buffer, TTL Level LSTTL-Compatible Inputs

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NLU1GT126
Non-Inverting 3-State
Buffer, TTL Level
LSTTL-Compatible Inputs
The NLU1GT126 MiniGatet is an advanced CMOS high-speed
non-inverting buffer in ultra-small footprint.
The NLU1GT126 requires the 3-state control input (OE) to be set
Low to place the output in the high impedance state.
The device input is compatible with TTL-type input thresholds and
the output has a full 5.0 V CMOS level output swing.
The NLU1GT126 input and output structures provide protection
when voltages up to 7.0 V are applied, regardless of the supply
voltage.
Features
http://onsemi.com
MARKING
DIAGRAMS
UDFN6
MU SUFFIX
CASE 517AA
1
ULLGA6
1.0 x 1.0
CASE 613AD
9M
9M
High Speed: t
PD
= 3.8 ns (Typ) @ V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 2
mA
(Max) at T
A
= 25°C
TTL-Compatible Input: V
IL
= 0.8 V; V
IH
= 2.0 V
CMOS-Compatible Output:
V
OH
> 0.8 V
CC
; V
OL
< 0.1 V
CC
@ Load
Power Down Protection Provided on inputs
Balanced Propagation Delays
Ultra-Small Packages
These are Pb-Free Devices
1
1
ULLGA6
1.2 x 1.0
CASE 613AE
9M
ULLGA6
1.45 x 1.0
CASE 613AF
1
9
M
= Device Marking
= Date Code
9M
OE
1
6
V
CC
PIN ASSIGNMENT
IN A
2
5
NC
1
2
3
GND
3
4
OUT Y
4
5
OE
IN A
GND
OUT Y
NC
V
CC
Figure 1. Pinout
(Top View)
6
FUNCTION TABLE
Input
OE
IN A
OUT Y
A
L
H
X
OE
H
H
L
Output
Y
L
H
Z
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
©
Semiconductor Components Industries, LLC, 2008
1
March, 2008 - Rev. 2
Publication Order Number:
NLU1GT126/D

 
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