SAF3560
Terrestrial digital radio processor
Rev. 5 — 8 February 2013
Product short data sheet
1. General description
The SAF3560 is a digital radio processor that demodulates and processes digital
terrestrial baseband signals, such as HD Radio signals, into audio signals and digital data
signals.
TUNER1
IF PROCESSING
baseband
I
2
S
interface
blend
digital
audio
OPTIONAL AUDIO POST
PROCESSING
AND STEREO
AUDIO DAC
blended
audio (analog)
SPI2
SERIAL NOR-FLASH
MEMORY
SAF3560
SDRAM
baseband I
2
S
interface
I
2
C-bus or SPI1
RENDERING
OF DATA:
TUNER2
IF PROCESSING
MICROPROCESSOR
LIVE TRAFFIC REPORTS
WEATHER
SPORTS SCORES
STOCK TICKER
001aal423
(1) The second input is only supported by specific types (see
Table 3)
Fig 1.
System block diagram
Major benefits of terrestrial radio processor systems with SAF3560 are:
•
•
•
•
•
•
•
Compatibility with conventional baseband radio reception ICs
Dramatically improved reception and sound quality
CD-sound quality without noise, interference and multipath fading for FM
Providing new data services
HD Radio reception including audio processing
Voltage partitioning of I/Os
Available in both LFBGA and HLQFP packages
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
System designers can add digital terrestrial radio capability in a simple and inexpensive
way through the SAF3560. The SAF3560 decodes digital radio input to provide digital
audio and also processes digital data. Multiple interfaces give flexibility while integrating
the SAF3560 into the receiver system.
2. Features and benefits
2.1 HD Radio technology
HD Radio signal decoding for AM and FM digital audio
Dual HD Radio support for support of second station for background scanning and
data service
Front end to baseband interface support through serial baseband I
2
S-bus type
interface
Secondary baseband interface for dual tuner applications
Metadata support for HD Radio reception
Data services support for HD Radio reception
Advanced HD Radio feature support, such as
1
:
Conditional Access (CA)
Store and replay
Apple ID3 tag
Multicasting
Electronic Program Guide (EPG)
2.2 Digital audio
Up to 6 channel (5.1) audio support through I
2
S-bus serial audio interface
Optional SRC (8 kHz to 48 kHz) for up to 6 channels of I
2
S-bus audio output
I
2
S-bus serial audio input for auxiliary processing
Optional SRC (8 kHz to 48 kHz) for I
2
S-bus input
Optional restricted support for 96 kHz input and output sample-rate conversion
Optional digital audio output through S/PDIF (without SRC)
Basic audio processing for external digital audio sources
Advanced audio processing (contact NXP Semiconductors for a list of supported audio
processing features:
Section 14 “Contact information”)
2.3 Memory
Supports SDR-SDRAM controller (up to 512 Mbit in 16-bit configuration)
Supports serial NOR-Flash memory with various sizes depending on the actual
application
1.
Contact NXP Semiconductors for a detailed list of supported feature sets:
Section 14 “Contact information”.
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
SAF3560_SDS
Product short data sheet
Rev. 5 — 8 February 2013
2 of 24
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
2.4 Other peripheral interfaces
Two I
2
C-bus interfaces
Three Serial Peripheral Interfaces (SPI)
One UART interface
Five individual GPIO pins for applications and diagnostics
One JTAG interface for diagnostics
2.5 Miscellaneous
One internal clock oscillator and two internal Phase-Locked Loops (PLL)
Can run on external crystal or reference clock from an external IC
Powerful signal and audio processing core architecture
Qualified in accordance with
AEC-Q100
3. Quick reference data
Table 1.
Power supply characteristics
After power-up the SAF3560 needs a reset pulse for at least 2 ms.
Symbol
Supply voltages
V
DDA(OSC)(1V2)
V
DDA(PLL)(1V2)
V
DDD(C)(1V2)
V
DDD(GP)(3V3)
V
DDD(DSP)(3V3)
V
DDD(JTAG)(3V3)
V
DDD(MC)(3V3)
V
DDD(MEM)(1V2)
V
DDD(SDRAM)(3V3)
Supply currents
I
DD
supply current
all core related blocks
all I/O related blocks
Power dissipation
P
tot
[1]
[2]
[1]
[2]
Parameter
oscillator analog supply voltage (1.2 V)
PLL analog supply voltage (1.2 V)
core digital supply voltage (1.2 V)
general purpose digital supply voltage (3.3 V)
DSP digital supply voltage (3.3 V)
JTAG digital supply voltage (3.3 V)
microcontroller digital supply voltage (3.3 V)
memory digital supply voltage (1.2 V)
SDRAM digital supply voltage (3.3 V)
Conditions
Min
1.14
1.14
1.14
3.0
3.0
3.0
3.0
1.14
3.0
-
-
-
Typ
1.2
1.2
1.2
3.3
3.3
3.3
3.3
1.2
3.3
90
28
0.2
Max
1.32
1.32
1.32
3.6
3.6
3.6
3.6
1.32
3.6
116
37
0.5
Unit
V
V
V
V
V
V
V
V
V
mA
mA
W
total power dissipation
Through pins V
DDA(OSC)(1V2)
, V
DDA(PLL)(1V2)
, V
DDD(C)(1V2)
and V
DDD(MEM)(1V2)
.
Through pins V
DDD(GP)(3V3)
, V
DDD(DSP)(3V3)
, V
DDD(JTAG)(3V3)
, V
DDD(MC)(3V3)
and V
DDD(SDRAM)(3V3)
.
SAF3560_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 5 — 8 February 2013
3 of 24
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
4. Ordering information
Table 2.
Ordering information
Package
Name
SAF3560HV/V110x
SAF3560EL/V110x
Table 3.
HLQFP144
LFBGA170
Description
plastic thermal enhanced low profile quad flat package; 144 leads;
body 20
20
1.4 mm; exposed die pad
plastic low profile fine pitch ball grid array package; 170 balls
Version
SOT612-4
SOT1315-1
Type number
Subtypes and main applications
Main application
HD Radio 1.0, supporting external clock from NXP
radio/audio DSPs
[1]
HD Radio 1.0 + Conditional Access (CA)
HD Radio 1.5, supporting external clock from NXP
radio/audio DSPs
[1]
HD Radio 1.5 + Conditional Access (CA)
HD Radio 1.0 + Conditional Access (CA), supporting
external clock from NXP radio/audio DSPs
[1]
HD Radio 1.5 + Conditional Access (CA), supporting
external clock from NXP radio/audio DSPs
[1]
Option
single tuner
single tuner
dual tuner
dual tuner
single tuner
dual tuner
HLQFP144
yes
yes
yes
yes
yes
yes
LFBGA170
yes
no
yes
no
yes
yes
Type number
SAF3560xx/V1100
SAF3560xx/V1101
SAF3560xx/V1102
SAF3560xx/V1103
SAF3560xx/V1104
SAF3560xx/V1105
[1]
Contact NXP Sales regarding supported radio/audio DSPs:
Section 14 “Contact information”.
SAF3560_SDS
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
Product short data sheet
Rev. 5 — 8 February 2013
4 of 24
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Product short data sheet
Rev. 5 — 8 February 2013
5 of 24
SAF3560_SDS
5. Block diagram
NXP Semiconductors
RESET_N
XTAL
JTAG
SPI1 (host)
FLASH
SPI2 (FLASH)
SPI3 (tuner)
2
×
I
2
C-bus
GPIO
UART
I/O
MUX
I/O
CONTROLLER
RESET
CGU
CLOCK
JTAG
CONTROLLER
SAF3560
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2013. All rights reserved.
internal bus
MEMORY
CONTROLLER
SDRAM
SDRAM
RADIO
SUB SYSTEM
baseband interface 1
(HD Radio)
baseband interface 2
(HD Radio)
FILTER
AND
SRC
DUAL
CHANNEL
RADIO
(1
×
audio and
data
1
×
data only)
AUDIO
SUB SYSTEM
SINGLE
CHANNEL
AUDIO
AUDIO
SRC
3
×
audio
I
2
S output
(optional S/PDIF)
Terrestrial digital radio processor
BLEND
audio I
2
S input
001aal422
SAF3560
Fig 2.
Block diagram of SAF3560
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