LTC2298/LTC2297/LTC2296
Dual 14-Bit, 65/40/25Msps
Low Power 3V ADCs
DESCRIPTIO
The LTC
®
2298/LTC2297/LTC2296 are 14-bit 65Msps/
40Msps/25Msps, low power dual 3V A/D converters de-
signed for digitizing high frequency, wide dynamic range
signals. The LTC2298/LTC2297/LTC2296 are perfect for
demanding imaging and communications applications
with AC performance that includes 74.3dB SNR and 90dB
SFDR for signals at the Nyquist frequency.
DC specs include
±1.2LSB
INL (typ),
±0.5LSB
DNL (typ)
and no missing codes over temperature. The transition
noise is a low 1LSB
RMS
.
A single 3V supply allows low power operation. A separate
output supply allows the outputs to drive 0.5V to 3.6V
logic. An optional multiplexer allows both channels to
share a digital output bus.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high perfor-
mance at full speed for a wide range of clock duty cycles.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
FEATURES
■
■
■
■
■
■
■
■
■
■
■
■
■
■
Integrated Dual 14-Bit ADCs
Sample Rate: 65Msps/40Msps/25Msps
Single 3V Supply (2.7V to 3.4V)
Low Power: 400mW/235mW/150mW
74.3dB SNR
90dB SFDR
110dB Channel Isolation at 100MHz
Multiplexed or Separate Data Bus
Flexible Input: 1V
P-P
to 2V
P-P
Range
575MHz Full Power Bandwidth S/H
Clock Duty Cycle Stabilizer
Shutdown and Nap Modes
Pin Compatible Family
105Msps: LTC2282 (12-Bit), LTC2284 (14-Bit)
80Msps: LTC2294 (12-Bit), LTC2299 (14-Bit)
65Msps: LTC2293 (12-Bit), LTC2298 (14-Bit)
40Msps: LTC2292 (12-Bit), LTC2297 (14-Bit)
25Msps: LTC2291 (12-Bit), LTC2296 (14-Bit)
10Msps: LTC2290 (12-Bit), LTC2295 (14-Bit)
64-Pin (9mm
×
9mm) QFN Package
APPLICATIO S
■
■
■
■
Wireless and Wired Broadband Communication
Imaging Systems
Spectral Analysis
Portable Instrumentation
TYPICAL APPLICATIO
+
ANALOG
INPUT A
INPUT
S/H
OV
DD
14-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D13A
•
•
•
–
D0A
OGND
SNR (dBFS)
CLK A
CLOCK/DUTY CYCLE
CONTROL
MUX
CLOCK/DUTY CYCLE
CONTROL
CLK B
OV
DD
+
ANALOG
INPUT B
INPUT
S/H
–
14-BIT
PIPELINED
ADC CORE
OUTPUT
DRIVERS
D13B
•
•
•
D0B
OGND
229876 TA01
U
U
U
LTC2298: SNR vs Input Frequency,
–1dB, 2V Range, 65Msps
75
74
73
72
71
70
0
100
50
150
INPUT FREQUENCY (MHz)
200
229876 TA01b
229876fa
1
LTC2298/LTC2297/LTC2296
ABSOLUTE
AXI U RATI GS
Power Dissipation ............................................ 1500mW
Operating Temperature Range
LTC2298C, LTC2297C, LTC2296C ........... 0°C to 70°C
LTC2298I, LTC2297I, LTC2296I ..........–40°C to 85°C
Storage Temperature Range ..................–65°C to 125°C
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
) ................................................. 4V
Digital Output Ground Voltage (OGND) ....... –0.3V to 1V
Analog Input Voltage (Note 3) ..... –0.3V to (V
DD
+ 0.3V)
Digital Input Voltage .................... –0.3V to (V
DD
+ 0.3V)
Digital Output Voltage ................ –0.3V to (OV
DD
+ 0.3V)
PACKAGE/ORDER I FOR ATIO
64 GND
63 V
DD
62 SENSEA
61 VCMA
60 MODE
59 SHDNA
58 OEA
57 OFA
56 DA13
55 DA12
54 DA11
53 DA10
52 DA9
51 DA8
50 OGND
49 OV
DD
TOP VIEW
A
INA+
1
A
INA–
2
REFHA 3
REFHA 4
REFLA 5
REFLA 6
V
DD
7
CLKA 8
CLKB 9
V
DD
10
REFLB 11
REFLB 12
REFHB 13
REFHB 14
A
INB–
15
A
INB+
16
65
48 DA7
47 DA6
46 DA5
45 DA4
44 DA3
43 DA2
42 DA1
41 DA0
40 OFB
39 DB13
38 DB12
37 DB11
36 DB10
35 DB9
34 DB8
33 DB7
GND 17
V
DD
18
SENSEB 19
VCMB 20
MUX 21
SHDNB 22
OEB 23
DB0 24
DB1 25
DB2 26
DB3 27
DB4 28
DB5 29
DB6 30
OGND 31
OV
DD
32
UP PACKAGE
64-LEAD (9mm
×
9mm) PLASTIC QFN
T
JMAX
= 125°C,
θ
JA
= 20°C/W
EXPOSED PAD (PIN 65) IS GND AND MUST BE SOLDERED TO PCB
Consult LTC Marketing for parts specified with wider operating temperature ranges.
*The temperature grade is identified by a label on the shipping container.
CO VERTER CHARACTERISTICS
PARAMETER
Resolution
(No Missing Codes)
Integral Linearity Error
Differential
Linearity Error
Offset Error
Gain Error
Offset Drift
Full-Scale Drift
Gain Matching
Offset Matching
Transition Noise
CONDITIONS
●
The
●
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
LTC2298
MIN
TYP
MAX
14
–5
–1
–12
–2.5
±1.2
±0.5
±2
±0.5
±10
±30
±5
±0.3
±2
1
5
1
12
2.5
LTC2297
MIN
TYP
MAX
14
–5
–1
–12
–2.5
±1.2
±0.5
±2
±0.5
±10
±30
±5
±0.3
±2
1
5
1
12
2.5
LTC2296
MIN
TYP
MAX
14
–5
–1
–12
–2.5
±1.2
±0.5
±2
±0.5
±10
±30
±5
±0.3
±2
1
5
1
12
2.5
UNITS
Bits
LSB
LSB
mV
%FS
µV/°C
ppm/°C
ppm/°C
%FS
mV
LSB
RMS
229876fa
Differential Analog Input (Note 5)
Differential Analog Input
(Note 6)
External Reference
Internal Reference
External Reference
●
●
●
●
SENSE = 1V
2
U
U
W
W W
U
W
ORDER PART
NUMBER
LTC2298CUP
LTC2298IUP
LTC2297CUP
LTC2297IUP
LTC2296CUP
LTC2296IUP
QFN PART*
MARKING
LTC2298UP
LTC2297UP
LTC2296UP
Order Options
Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking:
http://www.linear.com/leadfree/
U
LTC2298/LTC2297/LTC2296
A ALOG I PUT
SYMBOL
V
IN
V
IN,CM
I
IN
I
SENSE
I
MODE
t
AP
t
JITTER
CMRR
PARAMETER
The
●
denotes the specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 4)
CONDITIONS
2.7V < V
DD
< 3.4V (Note 7)
Differential Input (Note 7)
Single Ended Input (Note 7)
Analog Input Leakage Current
SENSEA, SENSEB Input Leakage
MODE Input Leakage Current
Sample-and-Hold Acquisition Delay Time
Sample-and-Hold Acquisition Delay Time Jitter
Analog Input Common Mode Rejection Ratio
Full Power Bandwidth
Figure 8 Test Circuit
0V < A
IN+
, A
IN–
< V
DD
0V < SENSEA, SENSEB < 1V
0V < MODE < V
DD
●
●
●
●
●
●
Analog Input Range (A
IN+
–A
IN–
)
Analog Input Common Mode (A
IN+
+A
IN–
)/2
DY A IC ACCURACY
SYMBOL
SNR
PARAMETER
Signal-to-Noise Ratio
The
●
denotes the specifications which apply over the full operating temperature range,
otherwise specifications are at T
A
= 25°C. A
IN
= –1dBFS. (Note 4)
CONDITIONS
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free
Dynamic Range
2nd or 3rd
Harmonic
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
SFDR
Spurious Free
Dynamic Range
4th Harmonic
or Higher
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
S/(N+D)
Signal-to-Noise
Plus Distortion
Ratio
5MHz Input
12.5MHz Input
20MHz Input
30MHz Input
70MHz Input
140MHz Input
I
MD
Intermodulation
Distortion
Crosstalk
f
IN
= Nyquist,
Nyquist + 1MHz
f
IN
= Nyquist
●
●
●
●
●
●
●
●
●
●
●
●
U
W U
U
MIN
1
0.5
–1
–3
–3
TYP
±0.5V
to
±1V
1.5
1.5
MAX
1.9
2
1
3
3
UNITS
V
V
V
µA
µA
µA
ns
ps
RMS
dB
MHz
0
0.2
80
575
MIN
LTC2298
TYP
MAX
74.3
MIN
LTC2297
TYP
MAX
74.4
MIN
72.7
LTC2296
TYP
MAX
74.5
74.2
UNITS
dB
dB
dB
dB
72.4
72.1
74.3
74.3
73.9
90
75
75
90
85
80
90
80
78
90
90
90
74.3
71.9
71.6
74.2
74.1
71.9
90
–110
74.4
73.9
73.3
90
76
90
85
80
90
80
90
90
90
74.4
72.2
74.3
73.6
71.9
90
–110
73.4
71.8
90
–110
90
90
74.5
74.2
85
80
90
90
73.4
73
90
90
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
229876fa
3
LTC2298/LTC2297/LTC2296
I TER AL REFERE CE CHARACTERISTICS
PARAMETER
V
CM
Output Voltage
V
CM
Output Tempco
V
CM
Line Regulation
V
CM
Output Resistance
CONDITIONS
I
OUT
= 0
DIGITAL I PUTS A D DIGITAL OUTPUTS
SYMBOL
V
IH
V
IL
I
IN
C
IN
LOGIC OUTPUTS
OV
DD
= 3V
C
OZ
I
SOURCE
I
SINK
V
OH
V
OL
OV
DD
= 2.5V
V
OH
V
OL
OV
DD
= 1.8V
V
OH
V
OL
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
High Level Output Voltage
Low Level Output Voltage
I
O
= –200µA
I
O
= 1.6mA
Hi-Z Output Capacitance
Output Source Current
Output Sink Current
High Level Output Voltage
Low Level Output Voltage
PARAMETER
High Level Input Voltage
Low Level Input Voltage
Input Current
Input Capacitance
CONDITIONS
V
DD
= 3V
V
DD
= 3V
LOGIC INPUTS (CLK, OE, SHDN, MUX)
The
●
denotes the specifications which apply over the
full operating temperature range, otherwise specifications are at T
A
= 25°C. (Note 4)
MIN
●
●
●
4
U
U
U
U
U
(Note 4)
MIN
1.475
TYP
1.500
±25
3
4
MAX
1.525
UNITS
V
ppm/°C
mV/V
Ω
2.7V < V
DD
< 3.3V
–1mA < I
OUT
< 1mA
TYP
MAX
UNITS
V
2
0.8
–10
3
10
V
µA
pF
V
IN
= 0V to V
DD
(Note 7)
OE = High (Note 7)
V
OUT
= 0V
V
OUT
= 3V
I
O
= –10µA
I
O
= –200µA
I
O
= 10µA
I
O
= 1.6mA
●
●
3
50
50
2.7
2.995
2.99
0.005
0.09
2.49
0.09
1.79
0.09
0.4
pF
mA
mA
V
V
V
V
V
V
V
V
229876fa
LTC2298/LTC2297/LTC2296
POWER REQUIRE E TS
SYMBOL
V
DD
OV
DD
IV
DD
P
DISS
P
SHDN
P
NAP
PARAMETER
Analog Supply
Voltage
Output Supply
Voltage
Supply Current
Power Dissipation
Shutdown Power
(Each Channel)
Nap Mode Power
(Each Channel)
CONDITIONS
(Note 9)
(Note 9)
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 8)
LTC2298
MIN
TYP
MAX
●
●
●
●
Both ADCs at f
S(MAX)
Both ADCs at f
S(MAX)
SHDN = H,
OE = H, No CLK
SHDN = H,
OE = L, No CLK
The
●
denotes the specifications which apply over the full operating temperature
range, otherwise specifications are at T
A
= 25°C. (Note 4)
SYMBOL
f
s
t
L
PARAMETER
CLK Low Time
CONDITIONS
●
●
●
●
●
TI I G CHARACTERISTICS
Sampling Frequency (Note 9)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
Duty Cycle Stabilizer Off
Duty Cycle Stabilizer On
(Note 7)
t
H
CLK High Time
t
AP
t
D
t
MD
Sample-and-Hold
Aperture Delay
CLK to DATA Delay
C
L
= 5pF (Note 7)
●
●
●
●
MUX to DATA Delay C
L
= 5pF (Note 7)
Data Access Time
C
L
= 5pF (Note 7)
After OE↓
BUS Relinquish Time (Note 7)
Pipeline
Latency
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
All voltage values are with respect to ground with GND and OGND
wired together (unless otherwise noted).
Note 3:
When these pin voltages are taken below GND or above V
DD
, they
will be clamped by internal diodes. This product can handle input currents
of greater than 100mA below GND or above V
DD
without latchup.
Note 4:
V
DD
= 3V, f
SAMPLE
= 65MHz (LTC2298), 40MHz (LTC2297), or
25MHz (LTC2296), input range = 2V
P-P
with differential drive, unless
otherwise noted.
U W
LTC2297
MIN
TYP
MAX
2.7
0.5
3
3
78
235
2
15
3.4
3.6
95
285
LTC2296
MIN
TYP
MAX
2.7
0.5
3
3
50
150
2
15
3.4
3.6
60
180
UNITS
V
V
mA
mW
mW
mW
2.7
0.5
3
3
133
400
2
15
3.4
3.6
150
450
UW
MIN
1
7.3
5
7.3
5
LTC2298
TYP
MAX
65
7.7
7.7
7.7
7.7
0
500
500
500
500
MIN
1
11.8
5
11.8
5
LTC2297
TYP
MAX
40
12.5
12.5
12.5
12.5
0
500
500
500
500
MIN
1
18.9
5
18.9
5
LTC2296
TYP
MAX
25
20
20
20
20
0
500
500
500
500
UNITS
MHz
ns
ns
ns
ns
ns
1.4
1.4
2.7
2.7
4.3
3.3
5
5.4
5.4
10
8.5
1.4
1.4
2.7
2.7
4.3
3.3
5
5.4
5.4
10
8.5
1.4
1.4
2.7
2.7
4.3
3.3
5
5.4
5.4
10
8.5
ns
ns
ns
ns
Cycles
Note 5:
Integral nonlinearity is defined as the deviation of a code from a
straight line passing through the actual endpoints of the transfer curve.
The deviation is measured from the center of the quantization band.
Note 6:
Offset error is the offset voltage measured from –0.5 LSB when
the output code flickers between 00 0000 0000 0000 and
11 1111 1111 1111.
Note 7:
Guaranteed by design, not subject to test.
Note 8:
V
DD
= 3V, f
SAMPLE
= 65MHz (LTC2298), 40MHz (LTC2297), or
25MHz (LTC2296), input range = 1V
P-P
with differential drive. The supply
current and power dissipation are the sum total for both channels with
both channels active.
Note 9:
Recommended operating conditions.
229876fa
5
Microchip MCU
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
