DISCRETE SEMICONDUCTORS
DATA SHEET
BUJ100
Silicon Diffused Power Transistor
Product
specification
September 1999
NXP
Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ100
GENERAL DESCRIPTION
High-voltage, high-speed planar-passivated npn power switching transistor in the TO92 envelope intended for use
in compact fluorescent lamps and low power electronic lighting ballasts, converters and inverters, etc.
QUICK REFERENCE DATA
SYMBOL
V
CESM
V
CBO
V
CEO
I
C
I
CM
P
tot
V
CEsat
h
FE
t
fi
PARAMETER
Collector-emitter voltage peak value
Collector-Base voltage (open emitter)
Collector-emitter voltage (open base)
Collector current (DC)
Collector current peak value
Total power dissipation
Collector-emitter saturation voltage
Fall time (Inductive)
CONDITIONS
V
BE
= 0 V
TYP.
-
-
-
-
-
-
0.24
14
50
MAX.
700
700
400
1.0
2.0
2
1.0
20
70
UNIT
V
V
V
A
A
W
V
ns
T
lead
≤
25 ˚C
I
C
= 0.75 A;I
B
= 150mA
I
C
= 0.75 A;V
CE
= 5 V
I
C
= 1.0 A;I
BON
= 200mA
PINNING - TO92
PIN
1
2
3
DESCRIPTION
Emitter
Collector
Base
PIN CONFIGURATION
SYMBOL
c
b
e
3 2 1
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum Rating System (IEC 134)
SYMBOL
V
CESM
V
CEO
V
CBO
I
C
I
CM
I
B
I
BM
P
tot
T
stg
T
j
PARAMETER
Collector to emitter voltage
Collector to emitter voltage (open base)
Collector to base voltage (open emitter)
Collector current (DC)
Collector current peak value
Base current (DC)
Base current peak value
Total power dissipation
Storage temperature
Junction temperature
CONDITIONS
V
BE
= 0 V
MIN.
-
-
-
-
-
-
-
-
-65
-
MAX.
700
400
700
1.0
2.0
0.5
1.0
2
150
150
UNIT
V
V
V
A
A
A
A
W
˚C
˚C
T
lead
≤
25 ˚C
THERMAL RESISTANCES
SYMBOL
R
th j-lead
R
th j-a
PARAMETER
Thermal resistance
junction to lead
Thermal resistance
Junction to ambient
pcb mounted; lead length = 4mm
CONDITIONS
TYP.
-
150
MAX.
60
-
UNIT
K/W
K/W
September 1999
1
Rev 1.000
NXP
Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ100
STATIC CHARACTERISTICS
T
lead
= 25 ˚C unless otherwise specified
SYMBOL
I
CES
,I
CBO
I
CES
I
CEO
I
EBO
V
CEOsust
V
CEsat
V
BEsat
h
FE
h
FE
h
FE
PARAMETER
Collector cut-off current
1
Collector cut-off current
Emitter cut-off current
Collector-emitter sustaining voltage
Collector-emitter saturation voltage
Base-emitter saturation voltage
DC current gain
CONDITIONS
V
BE
= 0 V; V
CE
= V
CESMmax
V
BE
= 0 V; V
CE
= V
CESMmax
;
T
j
= 125 ˚C
V
CEO
= V
CEOMmax
(400V)
V
EB
= 9 V; I
C
= 0 A
I
B
= 0 A; I
C
= 10mA;
L = 25 mH
I
C
= 0.75 A;I
B
= 0.15 A
I
C
= 0.75 A; I
B
=0.15 A
I
C
= 10mA; V
CE
= 5 V
I
C
= 100mA; V
CE
= 5 V
I
C
= 0.75 A; V
CE
= 5 V
MIN.
-
-
-
-
400
-
-
11
12.5
9
TYP.
0.8
2.0
-
0.05
-
0.24
0.93
20
21
14
MAX.
100
500
100
100
-
1.0
1.3
27
31
20
UNIT
µA
µA
µA
µA
V
V
V
DYNAMIC CHARACTERISTICS
T
lead
= 25 ˚C unless otherwise specified
SYMBOL
PARAMETER
Switching times (resistive load)
t
on
t
s
t
f
t
s
t
f
t
s
t
f
Turn-on time
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
Turn-off storage time
Turn-off fall time
Switching times (inductive load)
Turn-off storage time
Turn-off fall time
CONDITIONS
I
Con
= 1.0 A; I
Bon
= -I
Boff
= 200mA;
R
L
= 75 ohms; V
BB2
= 4 V;
TYP.
MAX.
UNIT
0.65
0.88
250
0.88
1.2
338
µs
µs
ns
I
Con
= 1.0 A; I
Bon
= 200mA; L
B
= 1
µH;
-V
BB
= 5 V
I
Con
= 1.0 A; I
Bon
= 200mA; L
B
= 1
µH;
-V
BB
= 5 V; T
j
= 100 ˚C
0.51
50
0.7
70
µs
ns
-
-
1.4
130
µs
ns
1
Measured with half sine-wave voltage (curve tracer).
September 1999
2
Rev 1.000
NXP
Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ100
+ 50v
100-200R
!
100
Zth / (K/W)
0.5
10
0.2
0.1
0.05
0.02
P
D
0.1
D=0
0.01
tp
t
p
Horizontal
Oscilloscope
Vertical
300R
30-60 Hz
6V
1R
1
D=
T
t
T
10u 100u 1m 10m 100m
t/s
1
Fig.1. Test circuit for V
CEOsust
.
1u
10
100
Fig.4. Transient thermal impedance.
Zth
j-lead
= f(t); parameter D = t
p
/T
IC / mA
HFE
30
125 C
20
15
-40 C
10
25 C
250
VCE = 1V
5
100
10
0
VCE / V
min
VCEOsust
Fig.2. Oscilloscope display for V
CEOsust
.
1
0.001
0.01
0.1
IC/A
1
2
3
5
Fig.5. Typical DC current gain. h
FE
= f(I
C
)
parameter V
CE
PD%
Normalised Power Derating
HFE
30
120
110
100
90
80
70
60
50
40
30
20
10
0
125 C
-40 C
25 C
10
VCE = 5V
0
20
40
60
80
100
Tmb / C
120
140
1
0.001
0.01
0.1
IC/A
1
2
3
5
Fig.3. Normalised power dissipation.
PD% = 100
⋅
PD/PD
25˚C
= f (T
mb
)
Fig.6. Typical DC current gain. h
FE
= f(I
C
)
parameter V
CE
September 1999
3
Rev 1.000
NXP
Semiconductors
Product specification
Silicon Diffused Power Transistor
BUJ100
VCEsat VOLTAGE/V
2
VBEsat VOLTAGE/V
1.5
1.4
1.3
1.5
IC/IB = 3
125 C
1.2
1.1
1
IC/IB = 3
1
-40 C
25 C
0.9
25 C
0.8
0.5
0.7
125 C
0.6
-40 C
0
0.01
0.1
IC, COLLECTOR CURRENT/A
1
2
0.5
0.01
0.1
IC, COLLECTOR CURRENT/A
1
2
Fig.7. Collector-Emitter saturation voltage.
Solid Lines = typ values, I
C
/I
B
= 3
Fig.8. Base-Emitter saturation voltage.
Solid Lines = typ values, I
C
/I
B
= 3
INDUCTIVE SWITCHING
VCC
ICon
90 %
IC
LC
10 %
IBon
ts
tf
t
LB
T.U.T.
IB
toff
IBon
t
-IBoff
-VBB
Fig.9. Test circuit inductive load.
V
CC
= 300 V; -V
BE
= 5 V, L
C
= 200
µ
H; L
B
= 1
µ
H
tfi (ns)
275
250
225
200
175
150
125
100
75
50
25
0
2
4
6
HFE GAIN (IC/IB)
8
10
11
IC = 1A
IC = 1.5A
IC = 2A
Fig.10. Switching times waveforms with inductive load.
tfi (ns)
275
250
225
200
175
150
125
100
75
50
25
0
0.8
1
1.2
1.4
1.6
IC COLLECTOR CURRENT /A
1.8
2
2.2
IC/IB = 5
IC/IB =3
IC/IB = 10
Fig.11. Inductive switching.
tfi = f(h
FE
)
September 1999
4
Fig.12. Inductive switching.
tfi = f(I
C
)
Rev 1.000
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