SSD30N10-50D
Elektronische Bauelemente
26A, 100V, R
DS(ON)
50mΩ
N-Ch Enhancement Mode Power MOSFET
RoHS Compliant Product
A suffix of “-C” specifies halogen free
DESCRIPTION
These miniature surface mount MOSFETs utilize a high
cell density trench process to provide low R
DS(on)
and to
ensure minimal power loss and heat dissipation.
TO-252(D-Pack)
FEATURES
Low R
DS(on)
provides higher efficiency and extends
battery life
Low thermal impedance copper leadframe TO-252
saves board space
Fast switching speed
High performance trench technology
A
B
C
D
GE
APPLICATION
DC-DC converters and power management in portable
and battery-powered products such as computers, printers,
PCMCIA cards, cellular and cordless telephones.
M
K
J
HF
N
O
P
REF.
PACKAGE INFORMATION
Package
TO-252
MPQ
2.5K
LeaderSize
13’ inch
A
B
C
D
E
F
G
H
Millimeter
Min.
Max.
6.4
6.8
5.20
5.50
2.20
2.40
0.45
0.58
6.8
7.3
2.40
3.0
5.40
6.2
0.8
1.20
REF.
J
K
M
N
O
P
Millimeter
Min.
Max.
2.30 REF.
0.70
0.90
0.50
1.1
0.9
1.6
0
0.15
0.43
0.58
Drain
Gate
Source
ABSOLUTE MAXIMUM RATINGS
(T
A
= 25°C unless otherwise specified)
Parameter
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current
1
Pulsed Drain Current
2
Continuous Source Current (Diode Conduction)
1
Power Dissipation
1
T
C
=25℃
Operating Junction and Storage Temperature Range
Maximum Thermal Resistance Junction-Ambient
1
Maximum Thermal Resistance Junction-Case
Notes:
1. Surface Mounted on 1” x 1” FR4 Board.
2. Pulse width limited by maximum junction temperature.
http://www.SeCoSGmbH.com/
Any changes of specification will not be informed individually.
Symbol
V
DS
V
GS
T
C
=25℃
I
D
I
DM
I
S
P
D
T
J
, T
STG
R
θJA
R
θJC
Ratings
100
±20
20
36
30
50
-55 ~ 175
50
3.0
Unit
V
V
A
A
A
W
°C
°C / W
°C / W
Thermal Resistance Ratings
04-Mar-2011 Rev. A
Page 1 of 2
SSD30N10-50D
Elektronische Bauelemente
26A, 100V, R
DS(ON)
50mΩ
N-Ch Enhancement Mode Power MOSFET
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise specified)
Parameter
Gate-Source Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Current
1
Drain-Source On-Resistance
1
Forward Transconductance
1
Diode Forward Voltage
Symbol
V
GS(th)
I
GSS
I
DSS
I
D(ON)
R
DS(ON)
g
fs
V
SD
Min.
Static
1.0
-
-
-
34
-
-
-
-
Dynamic
2
Total Gate Charge
Gate-Source Charge
Gate-Drain Change
Turn-on Delay Time
Rise Time
Turn-off Delay Time
Fall Time
Q
g
Q
gs
Q
gd
T
d(on)
T
r
T
d(off)
T
f
-
-
-
-
-
-
-
25
5
19
9
15
45
39
-
-
-
-
-
-
-
nS
V
DD
=100V
I
D
= 9A
R
L
= 25
V
GEN
= 10V
nC
I
D
= 9 A
V
DS
= 25 V
V
GS
= 10 V
-
-
-
-
-
-
-
4.4
1.1
-
±100
1
25
-
50
59
-
-
μA
A
mΩ
S
V
V
nA
V
DS
=V
GS
, I
D
=250μA
V
DS
=0, V
GS
=20V
V
DS
=80V, V
GS
=0
V
DS
=80V, V
GS
=0,
T
J
=55°C
V
DS
=5V, V
GS
=10V
V
GS
=10V, I
D
=9.2A
V
GS
=4.5V, I
D
=6.1A
V
DS
=40V, I
D
=5.5A
I
S
=9A, V
GS
=0
Typ.
Max.
Unit
Test conditions
Notes:
1. Pulse test： PW
≦
300 us duty cycle
≦
2％.
2. Guaranteed by design, not subject to production testing.
http://www.SeCoSGmbH.com/
Any changes of specification will not be informed individually.
04-Mar-2011 Rev. A
Page 2 of 2
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