SEMICONDUCTOR
TECHNICAL DATA
General Description
It’s Mainly Suitable for Load Switching Cell Phones, Battery Powered
Systems and Level-Shifter.
KML0D6NP20EA
N and P-Ch Trench MOSFET
B
B1
A1
A
FEATURES
・N-Channel
: V
DSS
=20V, I
D
=600mA (R
DS(ON)
=0.70Ω @ V
GS
=4.5V).
: V
DSS
=20V, I
D
=500mA (R
DS(ON)
=0.85Ω @ V
GS
=2.5V).
: V
DSS
=20V, I
D
=350mA (R
DS(ON)
=1.25Ω @ V
GS
=1.8V).
・P-Channel
: V
DSS
=-20V, I
D
=-400mA (R
DS(ON)
=1.2Ω @ V
GS
=-4.5V).
: V
DSS
=-20V, I
D
=-300mA (R
DS(ON)
=1.6Ω @ V
GS
=-2.5V).
: V
DSS
=-20V, I
D
=-150mA (R
DS(ON)
=2.7Ω @ V
GS
=-1.8V).
C
1
6
2
C
5
D
3
4
P
P
DIM
A
A1
B
B1
C
D
H
J
P
MILLIMETERS
_
1.6 + 0.05
_
1.0 + 0.05
_ 0.05
1.6 +
_
1.2 + 0.05
0.50
_
0.2 + 0.05
_
0.5 + 0.05
_
0.12 + 0.05
5
H
1. Source 1
2. Gate 1
3. Drain 2
4. Source 2
5. Gate 2
6. Drain 1
TES6
MAXIMUM RATING (Ta=25℃)
CHARACTERISTIC
Drain-Source Voltage
Gate-Source Voltage
DC @T
A
=25℃
Drain Current
DC @T
A
=85℃
Pulsed
Source-Drain Diode Current
Drain Power Dissipation
Maximum Junction Temperature
Storage Temperature Range
Thermal Resistance, Junction to Ambient
SYMBOL
V
DSS
V
GSS
I
D
*
I
DP
I
S
P
D
*
T
j
T
stg
R
thJA
*
N-Ch
20
±6
515
370
650
450
280
150
-55½150
446
P-Ch
-20
±6
-390
-280
mA
-650
-450
280
mW
℃
℃
℃/W
UNIT
V
V
Marking
Lot No.
Type Name
A1
Note 1) *Surface Mounted on FR4 Board, t≤5sec
PIN CONNECTION (TOP VIEW)
S
1
G
1
D
2
1
6
D
1
G
2
S
2
1
2
3
6
5
4
2
5
3
4
2008. 9. 10
Revision No : 3
J
1/6
KML0D6NP20EA
ELECTRICAL CHARACTERISTICS (Ta=25℃)
CHARACTERISTIC
Static
Drain-Source Breakdown Voltage
BV
DSS
I
D
=250μ V
GS
=0V
A,
I
D
=-250μ V
GS
=0V
A,
V
GS
=0V, V
DS
=16V
Drain Cut-off Current
I
DSS
V
GS
=0V, V
DS
=-16V
Gate Leakage Current
I
GSS
V
GS
=±4.5V, V
DS
=0V
P-Ch
Gate Threshold Voltage
V
th
V
DS
=V
GS,
I
D
=250μ
A
V
DS
=V
GS,
I
D
=-250μ
A
V
GS
=4.5V, I
D
=600mA
V
GS
=-4.5V, I
D
=-350mA
V
GS
=2.5V, I
D
=500mA
Drain-Source ON Resistance
R
DS(ON)
*
V
GS
=-2.5V, I
D
=-300mA
V
GS
=1.8V, I
D
=350mA
V
GS
=-1.8V, I
D
=-150mA
V
GS
=4.5V, V
DS
=5V
ON State Drain Current
I
D(ON)
*
V
GS
=-4.5V, V
DS
=-5V
V
DS
=10V, I
D
=400mA
Forward Transconductance
Source-Drain Diode Forward
Voltage
Dynamic
N-Ch
Total Gate Charge
Q
g
*
P-Ch
Gate-Source Charge
Q
gs
*
N-Ch
: V
DS
=10V, I
D
=250mA, V
GS
=4.5V
P-Ch
: V
DS
=-10V, I
D
=-250mA, V
GS
=-4.5V
N-Ch
P-Ch
N-Ch
Gate-Drain Charge
Q
gd
*
P-Ch
Turn-on Delay time
t
d(on)
*
N-Ch
: V
DD
=10V, I
D
=200mA,
V
GS
=4.5V, R
G
=10Ω
P-Ch
: V
DD
=-10V, V
GS
=-4.5V,
I
D
=-200mA, R
G
=10Ω
N-Ch
P-Ch
N-Ch
P-Ch
-
-
-
-
-
450
5
5
25
35
-
-
-
ns
-
-
-
-
-
-
1500
75
150
225
-
-
pC
-
-
-
750
-
g
fs
*
V
DS
=-10V, I
D
=-250mA
I
S
=150mA, V
GS
=0V
V
SD
*
I
S
=-150mA, V
GS
=0V
P-Ch
-
-0.8
-1.2
P-Ch
N-Ch
-
-
0.4
0.8
-
1.2
V
P-Ch
N-Ch
-700
-
-
1.0
-
-
S
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
P-Ch
N-Ch
-
0.45
-0.45
-
-
-
-
-
-
700
P-Ch
N-Ch
-
-
-0.3
±0.5
±1.0
-
-
0.41
0.80
0.53
1.20
0.70
1.80
-
-100
±1.0
μ
A
±2.0
1.0
V
-1.0
0.70
1.20
0.85
1.60
1.25
2.70
-
mA
Ω
N-Ch
P-Ch
N-Ch
20
-20
-
-
-
0.3
-
V
-
100
nA
SYMBOL
TEST CONDITION
MIN.
TYP.
MAX.
UNIT
Turn-off Delay time
t
d(off)
*
Note 2) *Pulse test : Pulse width≤300㎲, Duty Cycle≤2%.
2008. 9. 10
Revision No : 3
2/6
KML0D6NP20EA
N-Channel
Fig 1. I
D
- V
DS
1.0
Fig 2. R
DS(on)
- I
D
Drain-Source On Resistance R
DS(on)
(Ω)
4.0
3.2
2.4
1.6
0.8
0.0
V
GS
=2.5V
V
GS
=1.8V
V
GS
=2.5V
V
GS
=1.8V
Drain Current I
D
(A)
0.8
V
GS
=2.0V
0.6
V
GS
=5,4,3V
0.4
0.2
V
GS
=1.0V
0.0
0.0
V
GS
=4.5V
0.5
1.0
1.5
2.0
2.5
3.0
0
0.2
0.4
0.6
0.8
1.0
Drain - Source Voltage V
DS
(V)
Drain - Current I
D
(A)
1.0
-55
C
Normalized Drain-Source On Resistance R
DS(on)
(Ω)
Fig 3. I
D
- V
GS
Fig 4. R
DS(ON)
- T
j
1.6
1.4
1.2
1.0
0.8
0.6
-50
V
GS
= 4.5V
I
D
= 350mA
Drain Current I
D
(A)
0.8
25
C
T
C
=125
C
0.6
0.4
0.2
0.0
0.0
0.5
1.0
1.5
2.0
2.5
-25
0
25
50
75
100
125
Gate - Source Voltage V
GS
(V)
Junction Temperature Tj ( C)
Fig 5. V
th
- Tj
I
D
= 250µA
Fig 6. I
DR
- V
SDF
Reverse Drain Current I
DR
(mA)
1000
T
j
=125
C
0.3
Gate Threshold Voltage V
th
(V)
0.2
0.1
-0.0
-0.1
-0.2
-0.3
-50
100
25
C
50
C
10
-25
0
25
50
75
100
125
1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Junction Temperature Tj ( C)
Source - Drain Forward Voltage V
SDF
(V)
2008. 9. 10
Revision No : 3
3/6
KML0D6NP20EA
Fig 7. V
GS
- Qg
5
100
V
DS
= 10V
I
D
= 250mA
Fig 8. C - V
DS
V
GS
= 0V
f = 1MHz
Gate - Source Voltage V
GS
(V)
Capacitance C (pF)
4
3
2
1
0
0.0
0.2
0.4
0.6
0.8
80
Ciss
60
40
20
0
0
4
8
12
16
20
Coss
Crss
Total Gate - Charge Qg (nC)
Drain - Source Voltage V
DS
(V)
Normalized Effective Transient Thermal Resistance
Fig 9. Transient Thermal Response Curve
10
0
Duty=0.5
0.2
0.1
P
DM
t
1
t
2
0.02
SINGLE
10
-1
0.05
- Duty cycle D = t
1
/t
2
- Per Unit Base = R
thJA
= 500 C /W
10
-3
10
-2
10
-1
10
0
10
1
10
2
10
3
10
-2
10
-4
Square Wave Pulse Duration (sec)
2008. 9. 10
Revision No : 3
4/6
KML0D6NP20EA
P-Channel
Fig 1. I
D
- V
DS
1.0
V
GS
=5V
Fig 2. R
DS(on)
- I
D
Drain-Source On Resistance R
DS(on)
(Ω)
4.0
3.2
2.4
V
GS
=1.8V
V
GS
=4V
V
GS
=3V
V
GS
=2.5V
Drain Current I
D
(A)
0.8
0.6
V
GS
=2V
0.4
0.2
0.0
0.0
V
GS
=1.8V
1.6
0.8
0.0
V
GS
=2.5V
V
GS
=4.5V
0.5
1.0
1.5
2.0
2.5
3.0
0
0.2
0.4
0.6
0.8
1.0
Drain - Source Voltage V
DS
(V)
Drain - Current I
D
(A)
1.0
-55
C
Normalized Drain-Source On Resistance R
DS(on)
(Ω)
Fig 3. I
D
- V
GS
Fig 4. R
DS(ON)
- T
j
1.6
1.4
1.2
1.0
0.8
0.6
-50
V
GS
= 4.5V
I
D
= 350mA
Drain Current I
D
(A)
0.8
25
C
0.6
0.4
0.2
0.0
0.0
T
C
=125
C
0.5
1.0
1.5
2.0
2.5
3.0
-25
0
25
50
75
100
125
Gate - Source Voltage V
GS
(V)
Junction Temperature Tj ( C)
Fig 5. V
th
- Tj
I
D
= 250µA
Fig 6. I
DR
- V
SDF
Reverse Drain Current I
DR
(mA)
1000
T
j
=125
C
0.3
Gate Threshold Voltage V
th
(V)
0.2
0.1
-0.0
-0.1
-0.2
-0.3
-50
100
25
C
10
-55
C
-25
0
25
50
75
100
125
1
0.0
0.2
0.4
0.6
0.8
1.0
1.2
1.4
Junction Temperature Tj ( C)
Source - Drain Forward Voltage V
SDF
(V)
2008. 9. 10
Revision No : 3
5/6
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