电子工程世界电子工程世界电子工程世界

关键词

搜索

型号

搜索

C1812C106K5R2C7289

产品描述CAPACITOR, CERAMIC, MULTILAYER, 50 V, X7R, 10 uF, SURFACE MOUNT, 1210
产品类别无源元件   
文件大小2MB,共16页
制造商KEMET(基美)
官网地址http://www.kemet.com
下载文档 详细参数 全文预览

C1812C106K5R2C7289概述

CAPACITOR, CERAMIC, MULTILAYER, 50 V, X7R, 10 uF, SURFACE MOUNT, 1210

电容, 陶瓷, 多层, 50 V, ×7R, 10 uF, 表面贴装, 1210

C1812C106K5R2C7289规格参数

参数名称属性值
最大工作温度125 Cel
最小工作温度-55 Cel
负偏差20 %
正偏差20 %
额定直流电压urdc50 V
加工封装描述CHIP
无铅Yes
欧盟RoHS规范Yes
中国RoHS规范Yes
状态ACTIVE
端子涂层MATTE TIN OVER NICKEL
安装特点SURFACE MOUNT
制造商系列C1812C106K5R2C7289
尺寸编码1210
电容10 uF
包装形状RECTANGULAR PACKAGE
电容类型CERAMIC
端子形状J BEND
温度系数15%
温度特性代码X7R
多层Yes

文档预览

下载PDF文档
Surface Mount Multilayer Ceramic Chip Capacitors
KPS Series – Commercial Grade (X7R Dielectric)
Overview
KEMET’s
KPS
Series (KEMET
Power Solutions)
utilizes
proprietary lead-frame technology to vertically stack one or two
multilayer ceramic chip capacitors (MLCCs) into a single compact
surface mount package. The attached lead-frame mechanically
isolates the capacitor/s from the printed circuit board, therefore
offering advanced mechanical and thermal stress performance.
Isolation also addresses concerns for audible, microphonic noise
that may occur when a bias voltage is applied.
A two chip stack offers up to double the capacitance in the same
or smaller design footprint when compared to traditional surface
mount MLCC devices.
Providing up to 10mm of board flex capability, KPS Series
capacitors are environmentally friendly and in compliance with
RoHS legislation. Available in X7R dielectric, these devices are
capable of Pb-free reflow profiles and provide lower ESR, ESL
and higher ripple current capability when compared to other
dielectric solutions.
Benefits
Higher capacitance in the same footprint
Potential board space savings.
Advanced protection against thermal and mechanical stress
Provides up to 10mm of board flex capability
Reduces audible, microphonic noise
Extremely low ESR and ESL
Pb-Free and RoHS compliant
Capable of Pb-Free reflow profiles
Non-polar device, minimizing installation concerns
Automotive grade (AEC-Q200) under development.
Applications
Industrial, Automotive, Military, Telecom
Smoothing circuits
DC-to-DC converters
Power supplies (input/output filters)
Noise Reduction (piezoelectric / mechanical)
Circuits with a direct battery or power source connection.
Critical and safety relevant circuits without (integrated) current
limitation.
• Any application that is subject to high levels of board flexure or
temperature cycling
Ordering Information
C
Ceramic
2220
C
106
Capacitance
Code (pF)
2 Sig. Digits
+ Number of
Zeros
M
Capacitance
Tolerance
1
K = ±10%
M = ±20%
5
Voltage
8 = 10V
4 = 16V
3 = 25V
5 = 50V
1 = 100V
A = 250V
R
Dielectric
R = X7R
2
Failure Rate/Design
1 = KPS Single Chip Stack
2 = KPS Double Chip Stack
C
TU
Case Size Specification/
(L" x W")
Series
1210
1812
2220
C = Standard
End
Packaging/Grade
2
Metallization
(C-Spec)
3
C = 100%
Matte Sn
TU = 7" Reel
Unmarked
7289 = 13" Reel
Unmarked
Double chip stacks ("2" in the 13th character position of the ordering code) are only available in M (±20%) capacitance tolerance. Single chip stacks ("1" in
the 13th character position of the ordering code) are available in K (±10%) or M (±20%) tolerances.
2
Additional termination options may be available. Contact KEMET for details.
3
Additional reeling or packaging options may be available. Contact KEMET for details.
1
One WORLD
One Brand
One Strategy
One Focus
One Team
One KEMET
C1020-4 • 6/22/2010
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
MSP430和NRF24L01的封闭环境检测系统
MSP430和NRF24L01的封闭环境检测系统 297775 ...
fish001 微控制器 MCU
第一次画的PCB板子,求拍砖/
第一次画的板子,求指点。 ...
我是新来的 PCB设计
参与HELPER2416开发板助学计划:小问题,求解答
纯新手,今天硬件检查,使用超级终端开机的时候无板子信息打印,COM1等其他的硬件都是好的,设置什么的都是正常的,已检查!我使用的是USB转串口,用USBmini供电,不知为何会无板子信息打印! ......
yuer_52 嵌入式系统
(转)课堂和教授博弈 辩证法与放屁
上课时,我放了一个屁——很普通的屁。既不很臭,当然也绝对不香。可怕的是,教授正在讲辩证法。“请你自己对这个屁作一下判断,”教授说,“它好还是不好?”我只得说:“不好。”“错了,”教 ......
张无忌1987 聊聊、笑笑、闹闹
【ACTEL技术问题】请教高手关于ACTEL fpag的问题
一直用的ACTEL的APA750,遇到这样的奇怪问题:调试正确的时序如果再添加点时序,而且根本不会影响前面已经调试正确的模块时序,结果重新综合布局布线烧进去后就不正确了,连前面的时序都没有了, ......
eeleader FPGA/CPLD

 
EEWorld订阅号

 
EEWorld服务号

 
汽车开发圈

 
机器人开发圈

About Us 关于我们 客户服务 联系方式 器件索引 网站地图 最新更新 手机版

站点相关: 大学堂 TI培训 Datasheet 电子工程 索引文件: 6  1085  2555  579  1096  9  36  8  38  53 

器件索引   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z

北京市海淀区中关村大街18号B座15层1530室 电话:(010)82350740 邮编:100190

电子工程世界版权所有 京B2-20211791 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号 Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved