UNISONIC TECHNOLOGIES CO., LTD
UR5595
DDR TERMINATION
REGULATOR
DESCRIPTION
The UTC
UR5595
is a linear bus termination regulator
designed to meet JEDEC SSTL-2 and SSTL-3 (Stub Series
Terminated Logic) specifications for termination of DDR-SDRAM.
The device contains a high-speed operational amplifier to provide
excellent response to the load transients, and can deliver 1.5A
continuous current and transient peaks up to 3A in the application
as required for DDR-SDRAM termination.
With an independent V
SENSE
pin, the
UR5595
can provide
superior load regulation. The UR5595 provides a V
REF
output as
the reference for the application of the chipset and DIMMs.
The output, V
TT
, is capable of sinking and sourcing current
while regulating the output voltage equal to V
DDQ
/2. The output
stage has been designed to maintain excellent load regulation and
with fast response time to minimum the transition preventing
shoot-through. The UTC
UR5595
also incorporates two distinct
power rails that separates the analog circuitry (AVIN) from the
power output stage (PVIN). This power rail split can be utilized to
reduce the internal power dissipation. And this also permits UTC
UR5595
to provide a termination solution for DDRII SDRAM.
CMOS IC
Lead-free:
UR5595L
Halogen-free: UR5595G
FEATURES
* Power regulating with driving and sinking capability
* Low output voltage offset
* No external resistors required
* Low external component count
* Linear topology
* Low cost and easy to use
* Thermal shutdown protection
ORDERING INFORMATION
Normal
UR5595-S08-R
UR5595-SH2-R
Ordering Number
Lead Free
UR5595L-S08-R
UR5595L-SH2-R
Halogen Free
UR5595G-S08-R
UR5595G-SH2-R
Package
SOP-8
HSOP-8
Packing
Tape Reel
Tape Reel
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UR5595
PIN CONFIGURATION
CMOS IC
PIN DESCRIPTION
PIN NO
1
2
3
4
5
6
7
8
PIN NAME
NC
GND
V
SENSE
V
REF
V
DDQ
AV
IN
P
VIN
V
TT
DESCRIPTION
No internal connection. Can be used for vias.
Ground.
Feedback pin for regulating V
OUT
.
Buffered internal reference voltage of V
DDQ
/2.
Input for internal reference equal to V
DDQ
/2.
Analog input pin.
Power input pin.
Output voltage for connection to termination resistors.
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QW-R502-062.B
UR5595
BLOCK DIAGRAM
CMOS IC
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UR5595
ABSOLUTE MAXIMUM RATINGS
PARAMETER
CMOS IC
SYMBOL
RATINGS
UNIT
PV
IN
, AV
IN
, V
DDQ
to GND
V
DD
-0.3 ~ +6
V
Supply Voltage
AV
IN
to GND(Note 1)
V
DD
2.2 ~ 5.5
V
℃
Junction Temperature
T
J
+150
℃
Operation Temperature
T
OPR
0 ~ +125
℃
Storage Temperature
T
STG
-65 ~ +150
Note: 1.Signified recommend operating range that indicates conditions for which the device is intended to be
functional, but does not guarantee specific performance limits.
2.Absolute maximum ratings indicate limits beyond which damage to the device may occur.
THERMAL DATA
PARAMETER
Thermal Resistance Junction-Ambient
SYMBOL
θ
JA
RATINGS
150
UNIT
℃/W
ELECTRICAL CHARACTERISTICS
(T
J
=25℃, V
IN
=AV
IN
=PV
IN
=2.5V, V
DDQ
=2.5V, unless otherwise specified).
PARAMETER
V
REF
Voltage
SYMBOL
V
REF
TEST CONDITIONS
V
IN
= V
DDQ
= 2.3V
V
IN
= V
DDQ
= 2.5V
V
IN
= V
DDQ
= 2.7V
V
IN
= V
DDQ
= 2.3V
V
IN
= V
DDQ
= 2.5V
V
IN
= V
DDQ
= 2.7V
V
IN
= V
DDQ
= 2.3V
V
IN
= V
DDQ
= 2.5V
V
IN
= V
DDQ
= 2.7V
I
OUT
= 0A
I
OUT
= -1.5A
I
OUT
= +1.5A
I
OUT
= 0A
I
REF
= -30 ~ +30
μA
MIN
1.135
1.235
1.335
1.125
1.225
1.325
1.125
1.225
1.325
-20
-25
-25
TYP
1.158
1.258
1.358
1.159
1.259
1.359
1.159
1.259
1.359
0
0
0
320
13
2.5
100
165
10
MAX
1.185
1.285
1.385
1.190
1.290
1.390
1.190
1.290
1.390
20
25
25
500
UNIT
V
I
OUT
= 0A
V
TT
Output Voltage
I
OUT
= ±1.5A
V
TT
V
V
TT
Output Voltage Offset (V
REF
- V
TT
)
Quiescent Current
V
SENSE
Input Current
V
REF
Output Impedance
V
DDQ
Input Impedance
Thermal Shutdown
Thermal Shutdown Hysteresis
V
O(OFF)
V
TT
I
Q
I
SENSE
Z
VREF
Z
VDDQ
T
SHDN
T
HYS
mV
μA
nA
kΩ
kΩ
℃
℃
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UR5595
PIN DESCRIPTIONS
AV
IN
, PV
IN
CMOS IC
Input supply pins.
AV
IN
and PV
IN
are two independent input supply pins for UR5595. AV
IN
is used to supply all the
internal analog circuits and PV
IN
is only used to supply the output stage to create the regulated V
TT
. Using a higher
PV
IN
voltages will increase the driving capability of V
TT
, but the internal power loss will also increase. If the junction
temperature exceeds the thermal shutdown than the UR5595 will enter a shutdown state, where V
TT
is tri-stated and
V
REF
remains active.
For SSTL-2 applications, the AV
IN
and PV
IN
can be short together at 2.5V to eliminate the need for bypassing
capacitors for the two supply pins separately.
V
DDQ
The input pin used to create the internal reference voltage from a resistor divider of two internal 50kΩ
resistors for
regulating V
TT
and to guarantee V
TT
will track V
DDQ
/2 precisely. As a remote sense by connecting V
DDQ
directly to the
2.5V rail for SSTL-2 applications is an optimal implementation of V
DDQ
at the DIMM. This ensures that the reference
voltage tracks the DDR memory rails precisely without a large voltage drop from the power lines.
V
SENSE
The sense pin supply improved remote load regulation; if remote load regulation is not used then the V
SENSE
pin
must still be connected to V
TT
. A long trace will cause a significant IR drop resulting in a termination voltage lower at
one end of the bus than the other. Connect V
SENSE
pin to the middle of the bus to provide a better distribution across
the entire termination bus can reduce the IR drop.
V
REF
V
REF
supply the buffered output of the internal reference voltage (V
DDQ
/2). It can provide the reference voltage of
the Northbridge chipset and memory. For better performance, a bypass ceramic capacitor of 0.1μF~0.01μF, located
close to the pin, can be used to to help with noise.
V
TT
V
TT
is a regulated output that is used to terminate the bus resistors of DDR-SDRAM. It can precisely track the
V
DDQ
/2 voltage with the sinking and sourcing current capability. The UTC
UR5595
is designed to handle peak
transient currents of up to ± 3A with a fast transient response. If a transient is expected to remain above the
maximum continuous current rating for a significant amount of time then the output capacitor size should be large
enough to prevent an excessive voltage drop.
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QW-R502-062.B
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