Data Sheet
CME8000
Receiver IC
1 Short Description
The CME8000 is a BiCMOS integrated straight through receiver with build in very high sensitivity
and a pre-decoding of the time signal transmitted from WWVB, DCF77, JJY, MSF and HBG. The
receiver is prepared for multi-mode reception by using an integrated logic. Integrated functions as
stand by mode, integrated antenna switching, integrated crystal switching and a hold mode
function offer features for universal applications.
The power down mode increases the battery lifetime significantly and makes the device ideal for all
kinds of radio controlled time pieces.
2 Features
o
o
o
o
o
o
o
o
o
o
Low power consumption (<100µA)
Very high sensitivity (0.4µV)
Build in pulse decoding for different protocols
Switchable for 3 different frequencies
High selectivity by using crystal filter
Power down mode
Only a few external components necessary
AGC hold mode
Wide frequency range (40 ... 120 kHz)
Low power applications (1.2 .. 5.0 V)
o
o
o
o
o
o
Automatic protocol recognition
Pre-decoded protocol information
Fast data transfer to CPU (100ms)
Use of the CPU clock (32768Hz)
Improved noise resistance
Integrated AGC adaptation
Two built-in low impedance antenna switches
(40 Ohm/3V)
o
True Bit strength indication
Benefits
o
o
o
o
Extended Battery operating time
Decoding of the signal extremely simplified
Simplified micro controller software
Simplified multi frequency handling
o
Easy world time piece design
o
Automatic country recognition
o
True signal quality information
Block Diagram
QIN
QLOUT
QMOUT QHOUT
VCC
VL
PON
GNDL
ANT1
crystal switch
Bias
I/O
Unit
CLKSEL
Logic
CLOCK
DR
DATA
DT
BSI1
BSI2
IN1
IN2
AGC
ANT2
GND
rect.-
AGC
TCO
contr. unit
DEM
Figure 1.
PK
SS1
SS2
TEST
HLD
SPEC No.
Revision
State
C-MAX printed
Version
Page
CME8000
B.15
09.03.07
03.05.2007
English
1 of 21
C-MAX
Time Solutions
Data Sheet
CME8000
3 Ordering Information
Extended Type Number
Package
CME8000-DDT
no
CME8000-TLSH
yes
CME8000-TLPH
Yes
*The packaged version of CME8000 is prepared for lead-free soldering.
Remarks
die in trays
SSO28
SSO28 Taped and reeled
4 Absolute Maximum Ratings
Parameters
Supply voltage
Ambient temperature range 1.2 – 2.49V
Ambient temperature range 2.5 – 5.5V
Storage temperature range
Junction temperature
Electrostatic handling (MIL Standard 883 D HMB)
Electrostatic handling (MIL MM )
Symbol
VCC
T
amb
T
amb
R
stg
T
j
+/- V
ESD
+/- V
ESD
Value
5.5
-20 to +75
-40 to +85
-55 to +150
125
4
400
Unit
V
°C
°C
°C
°C
kV
V
5 PAD Coordinates
The CME8000 is available as die for "chip-on-board" mounting and in SSO28 package.
DIE size:
2,73mm x 2,5mm
PAD size:
contact window 84µm / 84µm
Thickness:
300µm±10µm
Symbol
ANT2
IN2
IN1
ANT1
VCC
QHOUT
QMOUT
QLOUT
GND
QIN
DEM
PK
TEST
PON
HLD
GNDL
BSI 2
BSI 1
DT
Data
DR
Clock
SS2
SS1
VL
CLKSEL
Function
Antenna switch 2
Input antenna
Input antenna
Antenna switch 1
Supply voltage analog part
Crystal 3 output
Crystal 2 output
Crystal 1 output
Ground analog part
Crystal input
Capacity for peak-detector
Capacity for AGC
Test I/O
Power on
AGC hold
Ground logic part
Bit strength indicator 2
Bit strength indicator 1
Data send clock
Data output
Data ready in register
Input 1024 / 4096Hz
Transmitter select 2
Transmitter select 1
Supply voltage logic part
Clock select
x-axis (µm)
924.0
582.4
395.3
156.5
156.5
156.5
156.5
156.5
153.8
156.5
505.2
767.0
1547.2
1711.3
1959.5
2319.8
2518.1
2518.1
2517.8
2517.8
2518.1
2517.5
2332.0
1950.1
1574.9
1287.4
y-axis (µm)
2243.6
2243.6
2243.6
2101.4
1908.1
1715.3
1519.2
1322.0
1161.6
881.3
172.4
172.4
181.6
181.6
181.6
174.5
355.0
805.6
1070.3
1468.7
1919.2
2185.9
2243.7
2243.7
2241.9
2243.7
Pad # (dice)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
Pin # (SSO28*)
1
2
3
4
5
6
7
8
9
10
12
13
14
16
17
18
19
20
21
22
23
24
25
26
27
28
SPEC No.
Revision
State
C-MAX printed
Version
Page
CME8000
B.15
09.03.07
03.05.2007
English
2 of 22
C-MAX
Time Solutions
6. Pad Layout
Data Sheet
CME8000
Pin Layout SSO28
IN1 IN2
3
2
ANT2 CLKSEL VL
1
SS1
24
SS2
ANT2
26
25
23
22
21
ANT1
VCC
QHOUT
QMOUT
QLOUT
GND
QIN
4
5
6
7
8
9
1
2
28
CLKSEL
27
VL
26
SS1
25
SS2
24
Clock
23
DR
22
Data
21
DT
20
BSI1
19
BSI2
18
GNDL
17
HLD
16
PON
15
NC
Clock
DR
IN1
20
Data
3
4
5
6
7
8
9
ANT1
19
DT
BSI1
10
18
The PAD coordinates
are referred to the left
bottom point of the contact
window
VCC
QHOUT
QMOUT
QLOUT
GND
CME8000
MFB
Y-axis
11
12
17
13 14
15
16
GNDL
BSI2
DEM PK
X-axis
Reference point
TEST PON HLD
Figure 2. Pad layout
QIN
10
NC
11
DEM
12
PK
13
TEST
14
Figure 3. Pin layout SSO28
SPEC No.
Revision
State
C-MAX printed
Version
Page
CME8000
B.15
09.03.07
03.05.2007
English
3 of 22
C-MAX
Time Solutions
IN1, IN2
A ferrite antenna is connected between IN1 and
IN2. For high sensitivity, the Q factor of the
antenna circuit should be as high as possible.
Please note that a high Q factor requires
temperature compensation of the resonant
frequency in most cases. We recommend a Q
factor between 40 and 150, depending on the
application. An optimal signal-to-noise ratio will be
achieved by a resonator resistance of 40 kOhm to
100 kOhm.
Data Sheet
CME8000
ANT1, ANT2
To realize a reception at different frequencies with
one antenna, it is possible to connect additional
capacitors between the inputs. An internal MOS-
switch is closed when a 60kHz protocol is
activated. A second internal switch is closed
choosing the JJY40 protocol (see table page 9).
The capacitors have to be connected between
ANT2 and IN1 for adjusting the 60kHz frequency,
and between ANT1 and IN2 to adjust the
frequency to 40kHz. Note in this case both
switches are closed.
In applications with supply voltages below 2.5V
the impedance of the switches is probably too
high for a good Q-factor.
In applications with less than 3 frequencies leave
the unused pins open
VCC
Pad 5
Pin 5
In order to achieve a high selectivity, a crystal is
connected between the Pins QOUT and QIN. It is
used with the serial resonant frequency according
to the time-code transmitter and acts as a serial
resonator. Up to 3 crystals could be connected
from QLOUT, QMOUT and QHOUT to the
common input QIN. The outputs will be
automatically selected by the pin SS1 and SS2
(see table). Only one of the outputs is active. Note
that the output QLOUT is active if JJY40 is
selected. QMOUT is active if a 60kHz protocol is
selected, and QHOUT is only active for DCF or
HBG.
In applications with less than 3 different
frequencies, leave the unused output pins open.
The given parallel capacitor of the filter crystal
(about 1.4 pF) is internally compensated so that
the bandwidth of the filter is about 10 Hz. The
impedance of QIN is high. Parasitic loads have to
be avoided.
VCC
Pad 5
Pin 5
110k
Q
110k
QHOUT PIN6
QMOUT PIN7
QLOUT PIN8
Pad6
Pad7
Pad8
GND
ANT1
Pad 4
Pin 4
200k
200k
Pad 9
Pin 9
Figure 5.
RF - AMP
QIN
IN1
VCC
Pad 3
Pin 3
Pad 5
Pin 5
IN2
Pad 2
Pin 2
200k
ANT2
Pad 1
Pin 1
from
AGC
QIN
Pad 10
Pin 10
1k
GND
Pad 9
Pin 9
Figure 4.
GND
Pad 9
Pin 9
Figure 6.
QHOUT, QMOUT, QLOUT
SPEC No.
Revision
State
DEM
C-MAX printed
Version
Page
CME8000
B.15
09.03.07
03.05.2007
English
4 of 22
C-MAX
Time Solutions
Demodulator output. To ensure the function, an
external capacitor has to be connected at this
output.
VCC
Pad 5
Pin 5
Data Sheet
CME8000
NOTE: Automatic adjustment of PK and DEM
timing
To realize a good regulation timings of the
demodulator and the peak detector the charge
and discharge currents for the capacitors at DEM
and PK have different values for the different
protocols. This is automatically switched internally
by choosing the protocol with SS1 and SS2.
DEM
Pad
10
Pin 12
25k
VCC, GND, VL, GNDL
GND
Pad 9
Pin 9
Figure 7.
V
CC
and GND are the supply voltage inputs for the
analog part. V
L
and GNDL are the supply voltage
inputs for the digital part. The positive supplies
have to be connected externally, and also the
ground pins.
To power down the circuitry it is recommended to
use the PON input and not to switch the power
supply. Switching the power supply results in a
long power up waiting time.
PK
Peak detector output. An external capacitor has to
be connected to ensure the function of the peak
detector. The value of the capacitance influences
the AGC regulation time.
VCC
Pad 5
Pin 5
VL
Pad 25
Pin 27
VCC
Pad 5
Pin 5
PK
Pad 12
Pin 13
GND
2k
+
-
from
demodulator
GNDL
Pad 16
Pin 18
Pad 9
Pin 9
Figure 9.
GND
Pad 9
Pin 9
Figure 8.
SPEC No.
Revision
State
C-MAX printed
Version
Page
CME8000
B.15
09.03.07
03.05.2007
English
5 of 22
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
