®
X9317
Low Noise, Low Power, 100 Taps
Data Sheet
December 16, 2009
FN8183.6
Digitally Controlled Potentiometer
(XDCP™)
The Intersil X9317 is a digitally controlled potentiometer
(XDCP™). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The
wiper position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS, U/D, and INC inputs.
The position of the wiper can be stored in nonvolatile
memory and then be recalled upon a subsequent power-up
operation.
The device can be used as a three-terminal potentiometer
for voltage control or as a two-terminal variable resistor for
current control in a wide variety of applications.
Features
• Solid-State Potentiometer
• 3-Wire Serial Up/Down Interface
• 100 Wiper Tap Points
- Wiper Position Stored in Nonvolatile Memory and
Recalled on Power-up
• 99 Resistive Elements
- Temperature Compensated
- End-to-end Resistance Range ±20%
• Low Power CMOS
- V
CC
= 2.7V to 5.5V, and 5V ±10%
- Standby Current <5µA
• High Reliability
- Endurance, 100,000 Data Changes per Bit
- Register Data Retention, 100 years
• R
TOTAL
Values = 1kΩ, 10kΩ, 50kΩ, 100kΩ
Pinouts
X9317
(8 LD TSSOP)
TOP VIEW
CS
V
CC
INC
U/D
1
2
3
4
X9317
8
7
6
5
R
L
R
W
V
SS
R
H
• Packages
- 8 Ld SOIC, PDIP, TSSOP, and MSOP
• Pb-Free Available (RoHS Compliant)
Applications
• LCD Bias Control
• DC Bias Adjustment
• Gain and Offset Trim
• Laser Diode Bias Control
X9317
(8 LD PDIP, 8 LD SOIC, 8 LD MSOP)
TOP VIEW
INC
U/D
R
H
V
SS
1
2
3
4
X9317
8
7
6
5
V
CC
CS
R
L
R
W
• Voltage Regulator Output Control
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas, Inc. Copyright Intersil Americas Inc. 2004-2005, 2008, 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
X9317
Ordering Information
(Continued)
PART NUMBER
X9317WS8IZ-2.7* (Note 1)
X9317WV8-2.7* (Note 2)
X9317WV8Z-2.7* (Note 1)
X9317WV8I-2.7*, ** (Note 2)
X9317WV8IZ-2.7* (Note)
X9317UM8-2.7* (Note 2)
X9317UM8Z-2.7* (Note 1)
X9317UM8I-2.7*, ** (Note 2)
X9317UM8IZ-2.7* (Note 1)
X9317US8-2.7* (Note 2)
X9317UP-2.7 (Note 2)
X9317UPI-2.7 (Note 2)
X9317US8Z-2.7* (Note 1)
X9317US8I-2.7*, ** (Note 2)
X9317US8IZ-2.7* (Note 1)
X9317UV8-2.7* (Note 2)
X9317UV8Z-2.7* (Note 1)
X9317UV8I-2.7*, ** (Note 2)
X9317UV8IZ-2.7* (Note 1)
X9317TM8-2.7*, ** (Note 2)
X9317TM8Z-2.7* (Note 1)
X9317TM8I-2.7*, ** (Note 2)
X9317TM8IZ-2.7* (Note 1)
X9317TP-2.7 (Note 2)
X9317TPI-2.7 (Note 2)
X9317TS8-2.7*, ** (Note 2)
X9317TS8Z-2.7* (Note 1)
X9317TS8I-2.7*, ** (Note 2)
X9317TS8IZ-2.7* (Note 1)
X9317TV8-2.7*, ** (Note 2)
X9317TV8Z-2.7* (Note 1)
X9317TV8I-2.7*, ** (Note 2)
X9317TV8IZ-2.7* (Note 1)
PART MARKING
X9317W ZG
317W F
9317W FZ
317W G
AKZ
AED
AOB
AFF
AOH
X9317U F
X9317UP F
X9317UP G
X9317U ZF
X9317U G
X9317U ZG
317U F
9317U FZ
317U G
9317U GZ
AGE
DCP
AGG
DCM
X9317TP F
X9317TP G
X9317T F
X9317T ZF
X9317T G
X9317T ZG
317T F
9317T FZ
317T G
9317T GZ
100
50
V
CC
LIMITS
(V)
2.7 to 5.5
R
TOTAL
(kΩ)
10
TEMPERATURE
RANGE (°C)
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
0 to +70
0 to +70
-40 to +85
-40 to +85
PACKAGE
8 Ld SOIC (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld SOIC
8 Ld PDIP
8 Ld PDIP
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld MSOP
8 Ld MSOP (Pb-free)
8 Ld PDIP
8 Ld PDIP
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld SOIC
8 Ld SOIC (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
8 Ld TSSOP
8 Ld TSSOP (Pb-free)
PKG.
DWG. #
M8.15E
M8.173
M8.173
M8.173
M8.173
M8.118
M8.118
M8.118
M8.118
M8.15E
MDP0031
MDP0031
M8.15E
M8.15E
M8.15E
M8.173
M8.173
M8.173
M8.173
M8.118
M8.118
M8.118
M8.118
MDP0031
MDP0031
M8.15E
M8.15E
M8.15E
M8.15E
M8.173
M8.173
M8.173
M8.173
*Add "T1" suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
**Add "T2" suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
2. Not recommended for new designs.
4
FN8183.6
December 16, 2009
嵌入式系统
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
