512 MByte Unbuffered DDR DIMM with ECC
CM72SD512
Key Features
u
Industry-standard 184-pin Double Data Rate (DDR) SDRAM
DIMM format
u
Ultra high density using 256 MBit SDRAM devices
u
Fully compliant with JEDEC specifications
-
built using JEDEC reference PCB designs
u
High Performance
-
-
-
two data transfers per clock cycle
unbuffered address path for desktop applications
Error Checking and Correcting (ECC) on module
u
SSTL-2 compatible (2.5V) switching
u
Serial Presence Detect (SPD) EEPROM provides automatic memory
configuration
u
Series termination on clock and data lines
u
Board footprint of less than 2.0 square inches
u
Built using eighteen 32M x 8 DDR SDRAMS, 8K refresh
u
Pin-compatible with all PC2100 and PC2700 modules
Selection Guide
CM72SD512-xxxxC2
MODULE SIZE:
512 MByte
SPEED:
2100: PC2100 (266 MHz)
2700: PC2700 (333 MHz)
BLANK = CAS Latency 2.5
C2 = CAS Latency 2
CORSAIR MEMORY
44141 S. Grimmer Blvd., Fremont, CA, 94538 (510) 657-8747
www.corsairmemory.com
512MB Unbuffered DDR DIMM with ECC
General Description
The CM72SD512 is a Double Data Rate SDRAM Dual Inline Memory
Module (DIMM), designed for applications in which both performance
and density are critical. These modules are constructed using 256 MBit
SDRAMs, and are fully compliant with appropriate JEDEC specifications.
These modules include eight ECC bits, which allows the system to detect
double-bit memory errors and correct single-bit memory errors.
These DIMMs are constructed using eighteen 32Mx8 DDR SDRAMs
in TSOP-II packages. The module also includes an EEPROM to support
Serial Presence Detect (SPD) requirements. Decoupling capacitors are
mounted on the printed circuit board for each DDR SDRAM device, and
series termination is provided on all clock and data lines.
The synchronous design of these Corsair SDRAM DIMMs allows precise
cycle control with the use of the system clock. Two I/O transactions
are possible on every clock cycle due to the use of double data rate
RAMs. The high clock frequency and high density of this device enable
a high level of performance to be achieved in advanced workstations
and servers.
Pin Definitions
Pin Name
A0 - A12
BA0, BA1
DQ0 - DQ63
CB0 - CB7
DQS0 - DQS8
CK0, /CK0
CKE0, CKE1
/CS0, /CS1
/RAS
/CAS
/WE
DM0 - DM8
VDD
VDDQ
VSS
VREF
VDDSPD
SDA
SCL
SA0 - SA2
/RESET
NC
Function
Address Inputs
Bank Address Select Inputs
Data Input/Output
ECC Check Bits
Data Strobe Input/Output
Clock Inputs
Clock Enable Inputs
Chip Select Inputs
Row Address Strobe Input
Column Address Strobe Input
Write Enable Input
Data Mask Inputs
Power Supply (2.5V)
Data Input/Output Power Supply
Ground
SSTL-2 Signalling Reverence Voltage
Serial EEPROM Power
SPD Data Output
SPD Clock Input
SPD Address Inputs
Reset Enable
No Connection
Page 2
512MB Unbuffered DDR DIMM with ECC
Pin Configuration
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Page 3
512MB Unbuffered DDR DIMM with ECC
Package Configuration
.160
MAX
5.250
COMPONENT AREA (BOTH SIDES)
.700
TYP
1.250
MAX
.091
TYP
Pin 1
.250
TYP
.040
TYP
.050
TYP
2.55
4.750
.091
TYP
.394
TYP
.050
TYP
1.95
© Corsair Memory Incorporated, October, 2002. Corsair and the Corsair Logo are trademarks of Corsair Memory Incorporated. All other trademarks
are the property of their respective owners. Corsair reserves the right to make changes without notice to any products herein. Corsair makes no warranty,
representation, or guarantee regarding the suitability of its products for any particular purpose, nor does Corsair assume any liability arising out of the
application of any product, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. Corsair does
not convey any license under its patent rights nor the rights of others. Corsair products are not designed, intended, or authorized for use in applications
intended to support or sustain life, or for any other application for which the failure of the Corsair product could create a situation in which personal
injury or death may occur.