19-3436; Rev 1; 11/04
MAX8550 Evaluation Kit
General Description
The MAX8550 evaluation kit (EV kit) is designed to evalu-
ate the MAX8550 DDR power-supply solution for note-
books, desktops, and graphics cards. The EV kit board
produces VDDQ at the output of the synchronous PWM
buck, VTT at the output of the sourcing/sinking LDO linear
regulator, and VTTR at the output of the reference buffer.
The VDDQ output is preset to 2.5V and sources up to
12A. The VTT output is always VDDQ/2 and can
source/sink up to 3A of peak current and 1.5A of contin-
uous current. The VTTR output is also always VDDQ/2
and can source/sink up to 10mA.
The MAX8550 EV kit was conveniently designed with
jumpers to select the OVP/UVP, TON,
SKIP,
STBY, and
SHDN_
modes. The board’s default settings enable
OVP (overvoltage protection), 600kHz switching fre-
quency, low-noise PWM mode, VDDQ, VTT, and VTTR.
The VIN input accepts voltages from 9V to 20V and
VDD requires a 5V bias supply.
The EV kit comes with the MAX8550 installed. Contact
the factory for free samples of the MAX8550A or
MAX8551 to evaluate these parts.
♦
VDDQ Preset to 2.5V/12A
♦
VTT 1.25V Source/Sink 1.5A Continuous/3A Peak
♦
VTTR 1.25V Source/Sink 10mA
♦
VIN Range: 9V to 20V
♦
Optimized Switching Frequency: 600kHz
♦
Overvoltage/Undervoltage Protection
♦
Standby
♦
Independent Shutdown
♦
Power OK
Features
Evaluates: MAX8550/MAX8550A/MAX8551
Ordering Information
PART
MAX8550EVKIT
TEMP RANGE
0°C to +70°C
IC PACKAGE
28 Thin QFN 5mm x 5mm
Note:
To evaluate the MAX8550A, request a free sample of the
MAX8550AETI when ordering the MAX8550 EV kit. To evaluate
the MAX8551, request a free sample of the MAX8551ETI when
ordering the MAX8550 EV kit.
Component List
DESIGNATION QTY
C1
1
DESCRIPTION
0.1µF
±10%,
50V X7R ceramic
capacitor (0603)
TDK C1608X7R1H104K
10µF
±10%,
6.3V X5R ceramic
capacitors (1206)
TDK C3216X5R0J106K or
TDK C3216X5R0J106M
1µF
±10%,
10V X5R ceramic
capacitors (0603)
TDK C1608X5R1A105K
4.7µF
±20%,
6.3V X5R ceramic
capacitor (0805)
TDK C2012X5R0J475M
0.22µF
±20%,
16V X7R ceramic
capacitors (0603)
TDK C1608X7R1C224M
10µF
±20%,
25V X5R ceramic
capacitors (1210)
Taiyo Yuden TMK325BJ106MM
TDK C3225X5R1E106M
DESIGNATION QTY
DESCRIPTION
Not installed
470µF
±20%,
25V aluminum
electrolytic capacitor (10mm x 16mm)
Sanyo 25MV470WX
3900pF, 50V X7R ceramic capacitor
(0603)
Kemet C0603C392K5RAC
150µF, 4V, 25mΩ low-ESR POS
capacitors (D2E)
Sanyo 4TPE150M
470pF
±5%,
50V COG ceramic
capacitor (0603)
TDK C1608COG1H471J
Not installed (0603)
Schottky diode, 30V, 100mA (SOD-323)
Central CMDSH-3
4-pin headers
3-pin headers
C8D
0
C2, C4A, C4B,
C4C, C4D,
C4E, C4F
7
C9
1
C3, C6, C13
3
C11, C12
2
C5
1
C14
C15, C16
D1
JU1, JU2
JU3–JU6
1
2
1
2
4
C7, C10
2
C8A, C8B, C8C
3
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
MAX8550 Evaluation Kit
Evaluates: MAX8550/MAX8550A/MAX8551
Component List (continued)
DESIGNATION QTY
L1
1
DESCRIPTION
1.0µH, 20A, 1.6mΩ power inductor
(12.6mm x 12.6mm x 5.2mm)
TOKO FDA1254-1R0M
n-channel MOSFET 30V, 9mΩ (SO-8)
International Rectifier IRF7821
n-channel MOSFET 30V, 5mΩ (SO-8)
International Rectifier IRF7832
10Ω
±5%
resistor (0603)
100kΩ
±5%
resistors (0603)
75kΩ
±1%
resistor (0603)
124kΩ
±1%
resistor (0603)
Not installed (0603)
0Ω resistors (0603)
Not installed (1812)
20Ω
±5%
resistor (0603)
MAX8550ETI (28-pin 5mm x 5mm Thin
QFN)
Shunts
MAX8550 EV kit PC board
Quick Start
The MAX8550 EV kit is fully assembled and tested. Follow
these steps to verify board operation.
Do not turn on the
power supplies until all connections are completed.
1) Ensure a shunt is placed across pins 1-4 of jumper
JU1 to enable OVP and UVP.
2) Ensure a shunt is placed across pins 1-2 of jumper
JU2 to set the switching frequency to approximately
600kHz.
3) Ensure a shunt is placed across pins 1-2 of jumper
JU3 to enable low-noise PWM mode.
4) Ensure a shunt is placed across pins 2-3 of jumper
JU4 to disable the VDDQ buck output.
5) Ensure a shunt is placed across pins 1-2 of jumper
JU5 to enable the VTT and VTTR outputs.
6) Ensure a shunt is placed across pins 2-3 of jumper
JU6 to set the board in normal operation mode.
7) Connect the 5VDC power supply across the VDD
pad and the PGND pad nearest VIN.
8) Connect the 12VDC power supply across the VIN
pad and the corresponding PGND pad.
9) Turn on both of the power supplies.
10)Set JU4 (1-2). This turns VDDQ on.
11)Using one of the DVMs, verify that the VDDQ voltage
between the VDDQ and PGND pads is 2.5V (±2%).
12)Using the other DVM, verify that the VTT voltage
between the VTT and PGND pads is 1.25V (±2%).
Q1
Q2
R1
R2, R3
R4
R5
R6, R7, R8
R9, R10, R11
R12
R13
U1
None
None
1
1
1
2
1
1
2
3
1
1
1
6
1
Component Suppliers
SUPPLIER
Central
Semiconductor
International
Rectifier
Kemet
Sanyo USA
TDK
TOKO America
PHONE
WEBSITE
631-435-1110 www.centralsemi.com
310-322-3331 www.irf.com
864-963-6300 www.kemet.com
619-661-6835 www.sanyo.com
847-803-6100 www.component.tdk.com
847-297-0070 www.tokoam.com
Detailed Description
Jumper Selection
Table 1. Overvoltage/Undervoltage
Control Input (OVP/UVP)
JUMPER
JU1
JU1
JU1
JU1
SHUNT
POSITION
1-2
1-3
1-4*
Open
DESCRIPTION
Disable OVP and UVP.
Enable UVP. Disable OVP.
Enable OVP and UVP.
Enable OVP. Disable UVP.
Note:
Indicate that you are using the MAX8550 when contact-
ing these component suppliers.
Recommended Equipment
• 5VDC power supply (500mA rated)
• 9VDC to 20VDC power supply (5A rated)
• Two digital voltmeters (DVM)
*Default
position.
Note:
Refer to the MAX8550/MAX8551 or MAX8550A data
sheet for additional information on OVP/UVP. This mode does
not directly apply to the MAX8551.
2
_______________________________________________________________________________________
MAX8550 Evaluation Kit
Evaluates: MAX8550/MAX8550A/MAX8551
Table 2. On-Time Selection Input (TON)
JUMPER
JU2
JU2
JU2
JU2
SHUNT
POSITION
1-2*
1-3
1-4
Open
DESCRIPTION
JUMPER
600kHz switching frequency
450kHz switching frequency
200kHz switching frequency
300kHz switching frequency
JU5
2-3
JU5
Table 5. Shutdown Control Input B
(SHDNB)
SHUNT
POSITION
1-2*
DESCRIPTION
The VTT and VTTR outputs are
enabled.
The VTT and VTTR outputs are
shut down.
*Default
position.
Note:
Refer to the MAX8550/MAX8551 or MAX8550A data
sheet for additional information on TON.
*Default
position.
Table 3. Pulse-Skipping Control Input
(SKIP)
JUMPER
JU3
JU3
SHUNT
POSITION
1-2*
2-3
DESCRIPTION
Low-noise PWM mode.
Pulse-skipping mode.
Use only this position when
evaluating the MAX8551.
Note:
Refer to the MAX8550/MAX8551 or MAX8550A data
sheet for additional information on
SHDNB
.
SHDNB
is TP0 on
the MAX8550A.
Caution:
Do not connect an external controller to the
SHDNB
pad while a shunt is on jumper JU5.
Table 6. Standby Control Input (STBY)
JUMPER
JU6
JU6
SHUNT
POSITION
1-2
2-3*
DESCRIPTION
The VTT output is shut down.
Normal operation.
*Default
position.
Note:
Refer to the MAX8550/MAX8551 or MAX8550A data
sheet for additional information on
SKIP
.
*Default
position.
Note:
Refer to the MAX8550/MAX8551 or MAX8550A data
sheet for additional information on STBY. STBY is
STBY
on the
MAX8550A.
Caution:
Do not connect an external controller to the
SKIP
pad while a shunt is on jumper JU3.
Caution:
Do not connect an external controller to the
STBY pad while a shunt is on jumper JU6.
Table 4. Shutdown Control Input A
(SHDNA)
JUMPER
JU4
JU4
SHUNT
POSITION
1-2
2-3*
DESCRIPTION
The VDDQ buck output is enabled.
The VDDQ buck output is shut
down.
Setting the Buck Regulator Output
Voltage (VDDQ)
The output voltage of the buck regulator is preset to
2.5V on the MAX8550 EV kit for DDR memory applica-
tions. To pin-strap the output voltage to 1.8V follow the
steps below:
1) Remove R9.
2) Solder the 0Ω resistor from step 1 in the R7 location.
Refer to the MAX8550/MAX8551 data sheet to change
the external components for optimum performance.
*Default
position.
Note:
Refer to the MAX8550/MAX8551 or MAX8550A data
sheet for additional information on
SHDNA
.
SHDNA
is
SHDN
on the MAX8550A.
Low-Side MOSFET Snubber Circuit (Buck)
Fast switching transitions cause ringing because of the
resonating circuit formed by the parasitic inductance
and capacitance at the switching LX node. This high-
frequency ringing occurs at the LX node’s rising and
Caution:
Do not connect an external controller to the
SHDNA
pad while a shunt is on jumper JU4.
_______________________________________________________________________________________
3
MAX8550 Evaluation Kit
Evaluates: MAX8550/MAX8550A/MAX8551
falling transitions and may interfere with circuit perfor-
mance and generate EMI. To dampen this ringing, an
optional series RC snubber circuit is added across the
low-side switch. Below is a simple procedure for select-
ing the value of the series RC for the snubber circuit:
1) Connect a scope probe to the LX node labeled on
the MAX8550 EV kit schematic and observe the ring-
ing frequency, f
R
.
2) Estimate the circuit parasitic capacitance (C
PAR
) at
LX by first finding a capacitor value, which, when
connected from LX to PGND1, reduces the ringing
frequency by half. C
PAR
can then be approximated
as 1/3 the value of the capacitor value found.
3) Estimate the circuit parasitic inductance (L
PAR
) from
the equation:
L
PAR
=
1
(2
π ×
f
R
)
2
×
C
PAR
4) Calculate R12 for critical dampening from the equation:
R12 = 2π
×
f
R
x L
PAR
Adjust the resistor value up or down to tailor the
desired damping and the peak voltage excursion.
5) Capacitor C15 should be at least 2 to 4 times the
value of C
PAR
to be effective.
The power loss of the snubber circuit (PWR_SNUB) is
dissipated in the resistor and can be calculated as:
PWR_SNUB = C15 x VIN
2
x f
SW
where VIN is the input voltage and f
SW
is the switching
frequency. Choose the power rating of R12 according
to the specific application’s derating rule for the power
dissipation calculated in the equation above.
Recommended snubber values for this EV kit are 3Ω
(R12) and 2.2nF (C15).
4
_______________________________________________________________________________________
VDDQ
VDDQ
R13
20Ω
C1
0.1µF
13
14
AVDD
AV
DD
R1
10Ω
V
DD
11
PGND2
VTTR
BST
20
C7
0.22µF
LX
VIN
V
IN
1
TON
DH
5
POK1
LX
AVDD
DL
R3
100kΩ
6
POK2
8 SS
PGND1
23
AVDD
24 GND
3
REF
C10
0.22µF
R4
75kΩ
1%
4
ILIM
SHDNB
AVDD
R7
OPEN
15
R9
0Ω
FB
STBY
7
SHDNA
27
JU4
1
2
AVDD
28 JU5
1
2
3
AVDD
JU6
1
2
3
STBY
3
SHDNB
SHDNA
C9
3900pF
REF
21
R2
100kΩ
3
18
4
1
2
6
5
Q1
7
IRF7821 8
6
5
17
C8A
10µF
C8B
10µF
C8C
10µF
VIN
(9V TO 20V)
R10
0Ω
D1
CMDSH-3
C5
4.7µF
10
AVDD
22
VDD
(5V BIAS SUPPLY)
C3
1µF
26
REFIN
SKIP
25
VTTI
1
JU3 2
3
C2
10µF
SKIP
VTT
12
C4C
10µF
C4D
10µF
C4F
10µF
C16
OPEN
C4E
10µF
VTT
9
VTTS
C4A
10µF
C4B
10µF
Figure 1. MAX8550 EV Kit Schematic
MAX8550
REF
4
3
OVP/UVP
AVDD
JU1
2
REF
4
3
JU2 2
1
1
2
LX
19
C6
1µF
C8D
OPEN
VDDQ
L1
1µH
C11
R12 150µF
OPEN
R11
0Ω
3
1
2
C15
OPEN
C12
150µF
PGND
VDDQ
2.5 AT 12A
C13
1µF
PGND
7
Q2
IRF7832 8
4
ON/OFF CONTROL LOGIC
STBY SHDNA SHDNB VDDQ
ON
1
0
1
0
0
1
ON
ON
1
1
1
1
OFF
0
0
0
OFF
0
0
VTT
ON
OFF
OFF
ON
OFF
VTTR
ON
OFF
ON
ON
OFF
C14
470pF
R5
124kΩ
1%
R8
OPEN
16 OUT
VDDQ
R6
OPEN
PGND
VTTR
GND
POK1
Evaluates: MAX8550/MAX8550A/MAX8551
_______________________________________________________________________________________
POK2
MAX8550 Evaluation Kit
5
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