intelligent gate drive signals to control the secondary
MOSFETs. With independent gate drive signals from the
controller, transformer design is no longer limited by the gate
to source rating of the secondary-side MOSFETs. Si9122A
provides constant V
GS
voltage, independent of line voltage
to minimize the gate charge loss as well as conduction loss.
A break-before-make function is included to prevent shoot
through current or transformer shorting. Adjustable Break-
Before-Make time is incorporated into the IC and is
programmable by an external resistor value.
Si9122A is packaged in lead (Pb)-free TSSOP-20 and
MLP65-20 packages. To satisfy stringent ambient
temperature requirements, Si9122A is rated to handle the
industrial temperature range of - 40 °C to 85 °C. When a
situation arises which results in a rapid increase in primary
(or secondary current) such as output shorted or start-up
with a large output capacitor, control of the PWM generator
is handed over to the current loop. Monitoring of the load
current is by means of an external current sense resistor in
the source of the primary low-side switch.
SI9122 BLOCK DIAGRAM
V
IN
V
CC
R
OSC
High-Side
Primary
Driver
Int
REG_COMP
Pre-Regulator
V
REF
9.1
V
+
-
BST
D
H
L
X
V
UVLO
8.8 V
Low-Side
Driver
OSC
Ramp
V
INDET
V
REF
+
-
+
-
V
UV
V
FF
V
CC
D
L
V
SD
550 mV
132 kΩ
60 kΩ
EP
Error Amplifier
-
+
V
REF
PGND
+
-
2
PWM
Comparator
Driver
Control
and
Timing
V
CC
SR
H
SYNC
Driver High
20 µA
SS
I
SS
8V
OTP
V
CC
+
-
Peak DET
Duty Cycle
Control
SR
L
CS2
CS1
Over Current Protection
GND
C
L_CONT
BBM
Si9122
SYNC
Driver Low
Figure 2.
www.vishay.com
2
Document Number: 73492
S-80038-Rev. D, 14-Jan-08
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9122A
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
All voltages referenced to GND = 0 V
Parameter
V
IN
(Continuous)
V
IN
(100 ms)
V
CC
V
BST
V
LX
V
BST
- V
LX
V
REF
, R
OSC
Logic Inputs
Analog Inputs
HV Pre-Regulator Input Current (Continuous)
Storage Temperature
Operating Junction Temperature
Power Dissipation
a
Thermal Impedance (
JA
)
TSSOP-20
b
MLP65-20
c
TSSOP-20
MLP65-20
Continuous
100 ms
Limit
80
100
14.5
95
113.2
100
15
- 0.3 to V
CC
+ 0.3
- 0.3 to V
CC
+ 0.3
- 0.3 to V
CC
+ 0.3
5
- 65 to 150
150
850
2500
75
38
mA
°C
mW
°C/W
V
Unit
Notes:
a. Device Mounted on JEDEC compliant 1S2P test board.
b. Derate - 14 mW/°C above 25 °C.
c. Derate - 26 mW/°C above 25 °C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
All voltages referenced to GND = 0 V
Parameter
V
IN
V
CC
Operating
CV
CC
f
OSC
R
OSC
R
BBM
C
REF
C
BOOST
Analog Inputs
Digital Inputs
Reference Voltage Output Current
Limit
28 to 75
10.5 to 13.2
4.7
200 to 625
22.6 to 72
22 to 50
0.1
0.1
0 V to V
CC
- 2 V
0 V to V
CC
0 to 2.5
Unit
V
µF
kHz
k
µF
V
mA
Document Number: 73492
S-80038-Rev. D, 14-Jan-08
www.vishay.com
3
End of Life. Last Available Purchase Date is 31-Dec-2014
Si9122A
Vishay Siliconix
SPECIFICATIONS
a
Test Conditions
Unless Otherwise Specified
f
NOM
= 500 kHz, V
IN
= 75 V
V
INDET
= 7.5 V; 10.5 V
V
CC
13.2 V
V
CC
= 12 V, 25 °C Load = 0 mA
V
REF
= 0 V
I
REF
= 0 to - 2.5 mA
at 100 Hz
R
OSC
= 30 k, f
NOM
= 500 kHz
F
MAX
F
FOBK
I
BIAS
A
V
BW
PSRR
SR
V
CM
A
VOL
BW
V
OS
dV
CS
= 0
CL_CONT Current
I
CL_CONT
dV
CS
= 100 mV
dV
CS
= 170 mV
Lower Current Limit Threshold
Upper Current Limit Threshold
Hysteresis
CL_CONT Clamp Level
PWM Operation
D
MAX
Duty Cycle
e
Pre-Regulator
Input Voltage
Input Leakage Current
Regulator Bias Current
Regulator_Comp
Pre-Regulator Drive Capacility
+ V
IN
I
LKG
I
REG1
I
REG2
I
SOURCE
I
SINK
I
START
I
IN
= 10
µA
V
IN
= 75 V, V
CC
> V
REG
V
IN
= 75 V, V
INDET
< V
SD
V
IN
= 75 V, V
INDET
> V
REF
V
CC
= 12 V
V
CC
< V
REG
- 29
50
20
86
8
- 19
82
28
75
10
200
14
-9
110
V
µA
mA
µA
mA
D
MIN
f
OSC
= 500 kHz
V
EP
= 0 V
V
EP
= 1.75 V
90
92
< 15
3
95
%
C
L_CONT(min)
V
TLCL
V
THCL
I
PD
= I
PU
- I
CL_CONT
= 0
See Figure 6
I
PD
> 2 mA
I
PU
< 500
µA
I
PU
= 500
µA
0.6
V
CS1
- GND, V
CS2
- GND
at 100 Hz
R
OSC
= 22.6 k
f
NOM
= 500 kHz, V
CS2
- V
CS1
> 150 mV
V
EP
= 0 V
- 40
- 2.2
5
60
0.5
± 150
17.5
5
±5
120
0
>2
100
150
- 50
1.5
V
mV
- 20
500
625
100
- 15
- 30
60
20
750
Limits
- 40 to 85 °C
Min.
b
3.2
Typ.
c
3.3
Max.
b
3.4
- 50
- 75
Unit
V
mA
mV
dB
%
kHz
Parameter
Reference (3.3 V)
Output Voltage
Short Circuit Current
Load Regulation
Power Supply Rejection
Oscillator
Accuracy (1 % R
OSC
)
Max Frequency
h
Foldback Frequency
d
Error Amplifier
Input Bias Current
Gain
Bandwidth
Power Supply Rejection
Slew Rate
Current Sense Amplifier
Input Voltage CM Range
Input Amplifier Gain
Input Amplifier Bandwidth
Input Amplifier Offset Voltage
Symbol
V
REF
I
SREF
dVr/dir
PSRR
µA
V/V
MHz
dB
V/µs
mV
dB
MHz
mV
µA
mA
V
CS2
- V
CS1
> 150 mV
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4
Document Number: 73492
S-80038-Rev. D, 14-Jan-08
End of Life. Last Available Purchase Date is 31-Dec-2014
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