VSKU71.., VSKV71.. Series
Vishay Semiconductors
ADD-A-PAK Generation VII
Power Modules Thyristor/Thyristor, 75 A
FEATURES
• High voltage
• Industrial standard package
• Low thermal resistance
• UL approved file E78996
• Compliant to RoHS directive 2002/95/EC
• Designed and qualified for industrial level
ADD-A-PAK
BENEFITS
• Excellent thermal performances obtained by the usage of
exposed direct bonded copper substrate
75 A
PRODUCT SUMMARY
I
T(AV)
• Up to 1600 V
• High surge capability
MECHANICAL DESCRIPTION
The ADD-A-PAK generation VII, new generation of
ADD-A-PAK module, combines the excellent thermal
performances obtained by the usage of exposed direct
bonded copper substrate, with advanced compact simple
package solution and simplified internal structure with
minimized number of interfaces.
• Easy mounting on heatsink
ELECTRICAL DESCRIPTION
These modules are intended for general purpose high
voltage applications such as high voltage regulated power
supplies, lighting circuits, temperature and motor speed
control circuits, UPS and battery charger.
MAJOR RATINGS AND CHARACTERISTICS
SYMBOL
I
T(AV)
I
T(RMS)
I
TSM
I
2
t
I
2
√t
V
RRM
T
Stg
T
J
Range
50 Hz
60 Hz
50 Hz
60 Hz
CHARACTERISTICS
85 °C
VALUES
75
115
1300
1360
8.45
7.68
84.5
400 to 1600
- 40 to 125
kA
2
s
kA
2
√s
V
°C
A
UNITS
Document Number: 94654
Revision: 17-May-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
1
VSKU71.., VSKV71.. Series
Vishay Semiconductors
ADD-A-PAK Generation VII
Power Modules Thyristor/Thyristor, 75 A
ELECTRICAL SPECIFICATIONS
VOLTAGE RATINGS
TYPE NUMBER
VOLTAGE
CODE
04
VSK.71
08
12
16
V
RRM
, MAXIMUM
REPETITIVE PEAK
REVERSE VOLTAGE
V
400
800
1200
1600
V
RSM
, MAXIMUM
NON-REPETITIVE PEAK
REVERSE VOLTAGE
V
500
900
1300
1700
V
DRM
, MAXIMUM REPETITIVE
PEAK OFF-STATE VOLTAGE,
GATE OPEN CIRCUIT
V
400
800
1200
1600
15
I
RRM,
I
DRM
AT 125 °C
mA
ON-STATE CONDUCTION
PARAMETER
Maximum average on-state current
Maximum continuous RMS on-state current
SYMBOL
I
T(AV)
I
T(RMS)
DC
T
C
t = 10 ms
Maximum peak, one-cycle non-repetitive
on-state current
I
TSM
t = 8.3 ms
t = 10 ms
t = 8.3 ms
t = 10 ms
Maximum I
2
t for fusing
I
2
t
t = 8.3 ms
t = 10 ms
t = 8.3 ms
Maximum I
2
√t
for fusing
Maximum value of threshold voltage
Maximum value of on-state
slope resistance
Maximum on-state voltage drop
Maximum non-repetitive rate of rise of
turned on current
Maximum holding current
Maximum latching current
Notes
(1)
I
2
t for time t = I
2
√t
x
√t
x
x
2
(2)
Average power = V
T(TO)
x I
T(AV)
+ r
t
x (I
T(RMS)
)
(3)
16.7 % x
π
x I
AV
< I <
π
x I
AV
(4)
I >
π
x I
AV
I
2
√t
(1)
V
T(TO) (2)
r
t
(2)
TEST CONDITIONS
180° conduction, half sine wave, T
C
= 85 °C
VALUES
75
115
80
UNITS
A
°C
No voltage
reapplied
100 % V
RRM
reapplied
No voltage
reapplied
1300
Sinusoidal
half wave,
initial T
J
= T
J
maximum
1360
1093
1140
8.45
Initial T
J
= T
J
maximum
7.68
5.97
5.45
84.5
0.96
1.08
3.28
2.86
1.72
150
250
400
kA
2
√s
V
kA
2
s
A
100 % V
RRM
reapplied
t = 0.1 ms to 10 ms, no voltage reapplied
T
J
= T
J
maximum
Low level
(3)
High level
(4)
Low level
(3)
High level
(4)
I
TM
=
π
x I
T(AV)
T
J
= T
J
maximum
T
J
= T
J
maximum
T
J
= 25 °C
mΩ
V
A/μs
V
TM
dI/dt
I
H
I
L
T
J
= 25 °C, from 0.67 V
DRM
,
I
TM
=
π
x I
T(AV)
, I
g
= 500 mA, t
r
< 0.5 μs, t
p
> 6 μs
T
J
= 25 °C, anode supply = 6 V,
resistive load, gate open circuit
T
J
= 25 °C, anode supply = 6 V, resistive load
mA
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2
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94654
Revision: 17-May-10
VSKU71.., VSKV71.. Series
ADD-A-PAK Generation VII
Vishay Semiconductors
Power Modules Thyristor/Thyristor, 75 A
TRIGGERING
PARAMETER
Maximum peak gate power
Maximum average gate power
Maximum peak gate current
Maximum peak negative gate voltage
SYMBOL
P
GM
P
G(AV)
I
GM
- V
GM
T
J
= - 40 °C
Maximum gate voltage required to trigger
V
GT
T
J
= 25 °C
T
J
= 125 °C
T
J
= - 40 °C
Maximum gate current required to trigger
I
GT
V
GD
I
GD
T
J
= 25 °C
T
J
= 125 °C
Maximum gate voltage that will not trigger
Maximum gate current that will not trigger
T
J
= 125 °C, rated V
DRM
applied
T
J
= 125 °C, rated V
DRM
applied
Anode supply = 6 V
resistive load
Anode supply = 6 V
resistive load
TEST CONDITIONS
VALUES
12
3.0
3.0
10
4.0
2.5
1.7
270
150
80
0.25
6
V
mA
mA
V
UNITS
W
A
BLOCKING
PARAMETER
Maximum peak reverse and off-state
leakage current at V
RRM
, V
DRM
Maximum RMS insulation voltage
Maximum critical rate of rise of off-state voltage
SYMBOL
I
RRM,
I
DRM
V
INS
dV/dt
TEST CONDITIONS
T
J
= 125 °C, gate open circuit
50 Hz
T
J
= 125 °C, linear to 0.67 V
DRM
VALUES
15
3000 (1 min)
3600 (1 s)
1000
UNITS
mA
V
V/μs
THERMAL AND MECHANICAL SPECIFICATIONS
PARAMETER
Junction operating and storage
temperature range
Maximum internal thermal resistance,
junction to case per leg
Typical thermal resistance,
case to heatsink per module
to heatsink
Mounting torque ± 10 %
busbar
Approximate weight
Case style
JEDEC
SYMBOL
T
J
, T
Stg
R
thJC
R
thCS
DC operation
Mounting surface flat, smooth and greased
A mounting compound is recommended and the
torque should be rechecked after a period of
3 hours to allow for the spread of the compound.
TEST CONDITIONS
VALUES
- 40 to 125
0.29
°C/W
0.1
4
Nm
3
75
2.7
g
oz.
UNITS
°C
TO-240AA compatible
ΔR
CONDUCTION PER JUNCTION
DEVICES
VSK.71..
SINE HALF WAVE CONDUCTION
180°
0.052
120°
0.062
90°
0.079
60°
0.116
30°
0.197
180°
0.037
RECTANGULAR WAVE CONDUCTION
120°
0.064
90°
0.085
60°
0.121
30°
0.200
UNITS
°C/W
Note
• Table shows the increment of thermal resistance R
thJC
when devices operate at different conduction angles than DC
Document Number: 94654
Revision: 17-May-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
3
VSKU71.., VSKV71.. Series
Vishay Semiconductors
Maximum allowable case temperature (°C)
ADD-A-PAK Generation VII
Power Modules Thyristor/Thyristor, 75 A
Maximum average on-state power loss (W)
130
RthJC (DC) = 0.29°C/W
180
160
140
120
100
80
60
40
20
0
0
20
40
60
80
100
120
Average on-state current (A)
Per leg, Tj = 125°C
120
110
100
90
80
70
0
10
20
30
40
50
60
70
80
Average on-state current (A)
180°
120°
90°
60°
30°
180°
120°
90°
60°
30°
DC
RMS limit
Fig. 1 - Current Ratings Characteristics
Fig. 4 - On-State Power Loss Characteristics
Maximum allowable case temperature (°C)
130
Peak half sine wave on-state current (A)
RthJC (DC) = 0.29°C/W
1200
1100
1000
900
800
700
600
Per leg
120
110
100
90
80
70
0
20
40
60
80
100
120
Average on-state current (A)
At any rated load condition and with
rated Vrrm applied following surge
Initial Tj = Tj max
@ 60 Hz 0.0083 s
@ 50 Hz 0.0100s
DC
180°
120°
90°
60°
30°
500
1
10
100
Number of equal amplitude half cycle current pulses (N)
Fig. 2 - Current Ratings Characteristics
Fig. 5 - Maximum Non-Repetitive Surge Current
Maximum average on-state power loss (W)
140
Peak half sine wave on-state current (A)
1400
180°
120°
90°
60°
30°
120
100
80
60
40
20
1200
1000
Maximum Non-repetitive Surge Current
Versus Pulse Train Duration. Control
of conduction may not be maintained.
Initial Tj = 125°C
No Voltage Reapplied
Rated Vrrm reapplied
RMS limit
800
600
Per leg
Per leg, Tj = 125°C
0
0
10
20
30
40
50
60
70
80
Average on-state current (A)
400
0.01
0.1
Pulse train duration (s)
1
Fig. 3 - On-State Power Loss Characteristics
Fig. 6 - Maximum Non-Repetitive Surge Current
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For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
Document Number: 94654
Revision: 17-May-10
VSKU71.., VSKV71.. Series
ADD-A-PAK Generation VII
Vishay Semiconductors
Power Modules Thyristor/Thyristor, 75 A
700
Maximum total power loss (W)
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
1 °C/W
2 °C/W
600
500
400
∼
180°
(sine)
180°
(rect)
300
200
100
0
0
0
20 40 60 80 100 120 140 160 180
Total output current (A)
2 x VSK.71 Series
single phase bridge connected
Tj = 125°C
20
40
60
80
100 120 140
Maximum allowable ambient temperature (°C)
Fig. 7 - On-State Power Loss Characteristics
800
Maximum total power loss (W)
700
600
500
400
300
200
100
0
0
50
0
100 150 200 250 300 350
Total output current (A)
3 x VSK.71 Series
6-pulse midpoint
connection bridge
Tj = 125°C
60°
(rect)
RthSA = 0.1 °C/W
0.2 °C/W
0.3 °C/W
0.5 °C/W
1 °C/W
20
40
60
80
100 120 140
Maximum allowable ambient temperature (°C)
Fig. 8 - On-State Power Loss Characteristics
1000
Instantaneous on-state current (A)
Per leg
100
10
Tj = 125°C
Tj = 25°C
1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Instantaneous on-state voltage (V)
Fig. 9 - On-State Voltage Characteristics
Document Number: 94654
Revision: 17-May-10
For technical questions within your region, please contact one of the following:
DiodesAmericas@vishay.com, DiodesAsia@vishay.com, DiodesEurope@vishay.com
www.vishay.com
5
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