TS3V912
3V RAIL TO RAIL
CMOS DUAL OPERATIONAL AMPLIFIER
.
.
.
.
.
.
.
.
.
.
DEDICATED TO
3.3V
OR
BATTERY SUPPLY
(specified at 3V and 5V)
RAIL TO RAIL INPUT AND OUTPUT
VOLTAGE RANGES
SINGLE SUPPLY OPERATION FROM
2.7V
TO 16V
EXTREMELY LOW INPUT BIAS CURRENT :
1pA
typ
LOW INPUT OFFSET VOLTAGE :
2mV max.
SPECIFIED FOR
600Ω
AND
100Ω
LOADS
LOW SUPPLY CURRENT : 200µA/Ampli
(VCC = 3V)
ESD TOLERANCE : 3KV
LATCH-UP IMMUNITY
MACROMODEL
INCLUDED IN THIS
SPECIFICATION
N
DIP8
(Plastic Package)
D
SO8
(Plastic Micropackage)
ORDER CODES
Part Number
TS3V912I/AI/BI
Temperature Range
-40, +125
o
C
Package
N
•
D
•
PIN CONNECTIONS
(top view)
DESCRIPTION
The TS3V912 is a RAIL TO RAIL CMOS dual
operational amplifier designed to operate with a
single 3V supply voltage.
The input voltage range V
icm
includes the two
supply rails V
CC+
and V
CC-
.
The output reaches :
•
V
CC-
+40mV
V
CC+
-50mV
with R
L
= 10kΩ
-
+
•
V
CC
+350mV V
CC
-350mV with R
L
= 600Ω
This product offers a broad supply voltage operat-
ing range from 2.7V to 16V and a supply current of
only 200µA/amp. (V
CC
= 3V).
Source and sink output current capability is typi-
cally 40mA (at V
CC
= 3V), fixed by an internal
limitation circuit.
SGS-THOMSON is offering a quad op-amp with
the same features : TS3V914.
October 1997
Output 1
Inverting Input 1
Non-inverting Input 1
1
2
3
4
-
+
-
+
8
V
CC
+
7
Output 2
6
Inverting Input 2
5
Non-inverting Input 2
V
CC
1/11
TS3V912
SCHEMATIC DIAGRAM
(1/2 TS3V912)
V
CC
Non-inverting
Input
Inte rnal
Vre f
Inverting
Input
O utput
V
CC
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
id
V
i
I
in
I
o
T
oper
T
stg
Notes :
Parameter
Supply Voltage - (note 1)
Differential Input Voltage - (note 2)
Input Voltage - (note 3)
Current on Inputs
Current on Outputs
Operating Free Air Temperature Range
TS3V912I/AI/BI
Storage Temperature
Value
18
±18
-0.3 to 18
±50
±130
-40 to +125
-65 to +150
Unit
V
V
V
mA
mA
o
C
C
o
1. All voltage values, except differential voltage are with respect to network ground terminal.
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal.
3. The magnitude of input and output voltages must never exceed V
CC+
+0.3V.
OPERATING CONDITIONS
Symbol
V
CC
V
icm
Supply Voltage
Common Mode Input Voltage Range
-
Parameter
Value
2.7 to 16
V
CC
-0.2 to
V
CC+
+0.2
Unit
V
V
2/11
TS3V912
ELECTRICAL CHARACTERISTICS
V
CC+
= 3V, V
CC-
= 0V, R
L
,C
L
connected to V
CC
/2, T
amb
= 25
o
C (unless otherwise specified)
Symbol
V
io
Parameter
Input Offset Voltage (V
ic
= V
o
= V
CC
/2)
T
min.
≤
T
amb
≤
T
max.
DV
io
I
io
I
ib
I
CC
CMR
SVR
A
vd
V
OH
TS3V912
TS3V912A
TS3V912B
TS3V912
TS3V912A
TS3V912B
TS3V912I/AI/BI
Min.
Typ.
Max.
10
5
2
12
7
3
5
1
100
200
1
150
300
200
300
400
70
50
80
3
10
2
2.95
2.9
2.96
2.3
2.6
2
2.8
2.1
30
300
900
50
70
400
100
600
20
20
40
40
0.8
0.4
0.3
30
30
120
mA
MHz
V/µs
V/µs
Degrees
nV
Hz
√
dB
mV
Unit
mV
Input Offset Voltage Drift
Input Offset Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Input Bias Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Supply Current (per amplifier, A
VCL
= 1, no load)
T
min.
≤
T
amb
≤
T
max.
Common Mode Rejection Ratio
V
ic
= 0 to 3V, V
o
= 1.5V
+
Supply Voltage Rejection Ratio (V
CC
= 2.7 to 3.3V, V
O
= V
CC
/2)
Large Signal Voltage Gain (R
L
= 10kΩ, V
O
= 1.2V to 1.8V)
T
min.
≤
T
amb
≤
T
max.
High Level Output Voltage (V
id
= 1V)
R
L
= 100kΩ
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100kΩ
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
R
L
= 10kΩ
R
L
= 600Ω
−
Source (V
o
= V
CC
)
+
Sink
(V
o
= V
CC
)
µV/
o
C
pA
pA
µA
dB
dB
V/mV
V
V
OL
Low Level Output Voltage (V
id
= -1V)
T
min.
≤
T
amb
≤
T
max.
I
o
GBP
SR
SR
-
∅m
e
n
V
O1
/V
O2
+
Output Short Circuit Current (V
id
=
±1V)
Gain Bandwidth Product
(A
VCL
= 100, R
L
= 10kΩ, C
L
= 100pF, f = 100kHz)
Slew Rate (A
VCL
= 1, R
L
= 10kΩ, C
L
= 100pF, V
i
= 1.3V to 1.7V)
Slew Rate (A
VCL
= 1, R
L
= 10kΩ, C
L
= 100pF, V
i
= 1.3V to 1.7V)
Phase Margin
Equivalent Input Noise Voltage (R
s
= 100Ω, f = 1kHz)
Channel Separation (f = 1kHz)
Note 1 :
Maximum values including unavoidable inaccuracies of the industrial test.
3/11
TS3V912
ELECTRICAL CHARACTERISTICS
V
CC+
= 5V, V
CC-
= 0V, R
L
,C
L
connected to V
CC
/2, T
amb
= 25
o
C (unless otherwise specified)
Symbol
V
io
Parameter
Input Offset Voltage (V
ic
= V
o
= V
CC
/2)
T
min.
≤
T
amb
≤
T
max.
DV
io
I
io
I
ib
I
CC
CMR
SVR
A
vd
V
OH
TS3V912
TS3V912A
TS3V912B
TS3V912
TS3V912A
TS3V912B
TS3V912I/AI/BI
Min.
Typ.
Max.
10
5
2
12
7
3
5
1
100
200
1
150
300
230
350
450
60
55
10
7
4.95
4.9
4.25
4.8
4.1
40
350
1400
50
100
500
150
750
45
45
65
65
1
0.8
0.6
30
120
30
mA
MHz
V/µs
V/µs
nV
Hz
√
dB
Degrees
mV
85
80
40
Unit
mV
Input Offset Voltage Drift
Input Offset Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Input Bias Current - (note 1)
T
min.
≤
T
amb
≤
T
max.
Supply Current (per amplifier, A
VCL
= 1, no load)
T
min.
≤
T
amb
≤
T
max.
Common Mode Rejection Ratio
V
ic
= 1.5 to 3.5V, V
o
= 2.5V
+
Supply Voltage Rejection Ratio (V
CC
= 3 to 5V, V
O
= V
CC
/2)
Large Signal Voltage Gain (R
L
= 10kΩ, V
O
= 1.5V to 3.5V)
T
min.
≤
T
amb
≤
T
max.
High Level Output Voltage (V
id
= 1V)
R
L
= 100kΩ
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
T
min.
≤
T
amb
≤
T
max.
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100kΩ
R
L
= 10kΩ
R
L
= 600Ω
R
L
= 100Ω
R
L
= 10kΩ
R
L
= 600Ω
−
Source (V
o
= V
CC
)
+
Sink
(V
o
= V
CC
)
µV/
o
C
pA
pA
µA
dB
dB
V/mV
V
4.95
4.55
3.7
V
OL
Low Level Output Voltage (V
id
= -1V)
T
min.
≤
T
amb
≤
T
max.
I
o
GBP
SR
+
-
SR
e
n
V
O1
/V
O2
∅m
Output Short Circuit Current (V
id
=
±1V)
Gain Bandwidth Product
(A
VCL
= 100, R
L
= 10kΩ, C
L
= 100pF, f = 100kHz)
Slew Rate (A
VCL
= 1, R
L
= 10kΩ, C
L
= 100pF, V
i
= 1V to 4V)
Slew Rate (A
VCL
= 1, R
L
= 10kΩ, C
L
= 100pF, V
i
= 1V to 4V)
Equivalent Input Noise Voltage (R
s
= 100Ω, f = 1kHz)
Channel Separation (f = 1kHz)
Phase Margin
Note 1 :
Maximum values including unavoidable inaccuracies of the industrial test.
4/11
TS3V912
TYPICAL CHARACTERISTICS
Figure 1 :
Supply Current (each amplifier)
versus Supply Voltage
SUPPLY CURRENT, I
CC
(
µ
A)
Figure 2 :
Input Bias Current versus Temperature
10 0
INPUT BIAS CURRENT, I
ib
(pA)
600
500
400
300
200
100
0
4
8
12
16
SUPP LY VOLTAGE, V
CC
(V)
T
amb
= 25 C
A
VC L
= 1
V
O
= V
CC
/ 2
V
CC
= 10V
V
i
= 5V
No load
10
1
25
50
75
100
125
TEMPERATURE, T
amb
( C)
Figure 3a :
High Level Output Voltage versus
High Level Output Current
5
OUTPUT VOLTAGE, V
OH
(V)
Figure 3b :
High Level Output Voltage versus
High Level Output Current
20
OUTPUT VOLTAGE, V
OH
(V)
4
3
2
T
amb
= 25 C
V
id
= 100mV
V
CC
= +5V
16
12
T
a mb
= 25 C
V
id
= 100mV
V
CC
= +16V
V
CC
= +10V
8
4
0
V
CC
= +3 V
1
0
-70
-56
-42
-28
-14
0
OUTPUT CURRENT, I
OH
(mA)
-70
-56
-42
-28
-14
0
OUTP UT CURRENT, I
OH
(mA)
Figure 4a :
Low Level Output Voltage versus
Low Level Output Current
5
4
3
2
1
T
amb
= 25 C
V
id
= -100mV
Figure 4b :
Low Level Output Voltage versus
Low Level Output Current
10
OUTPUT VOLTAGE, V
OL
(V)
OUTPUT VOLTAGE, V
OL
(V)
8
6
4
2
T
amb
= 25 C
V
id
= -100mV
V
CC
= +3V
V
CC
= 16V
V
CC
= 10V
V
CC
= +5V
0
14
28
42
56
70
0
14
28
42
56
70
OUTP UT CURRENT, I
OL
(mA)
OUTPUT CURRENT, I
OL
(mA)
5/11
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
