TS4902
300mW at 3.3V SUPPLY AUDIO POWER AMPLIFIER
WITH STANDBY MODE ACTIVE LOW
s
OPERATING FROM
V
CC
= 2.2V to 5.5V
s
0.7W
OUTPUT POWER @ Vcc=5V, THD=1%,
f=1kHz, with an
8
Ω
load
s
0.3W
OUTPUT POWER @ Vcc=3.3V,
THD=1%, f=1kHz, with an
8
Ω
load
s
ULTRA LOW CONSUMPTION IN STANDBY
MODE
(10nA)
s
77dB
PSRR @ 217Hz from 5V to 2.2V
s
ULTRA LOW POP & CLICK
s
ULTRA LOW DISTORTION
(0.1%)
s
UNITY GAIN STABLE
s
AVAILABLE IN
MiniSO8 & SO8
DESCRIPTION
The TS4902 is an audio power amplifier designed
to provide the best price to power ratio while pre-
serving high audio quality.
Available in MiniSO8 & SO8 package, it is capable
of delivering up to 0.7W of continuous RMS ouput
power into an 8
Ω
load @ 5V.
TS4902 is also exhibiting an outstanding 0.1%
distortion level (THD) from a 5V supply for a Pout
of 200mW RMS.
An externally controlled standby mode reduces
the supply current to less than 10nA. It also in-
cludes an internal thermal shutdown protection.
The unity-gain stable amplifier can be configured
by external gain setting resistors.
APPLICATIONS
s
Mobile Phones (Cellular / Cordless)
s
PDAs
s
Portable Audio Devices
ORDER CODE
Part Number
TS4902IST
TS4902ID
Temperature
Range
-40, +85°C
Package
VCC
-
AV = -1
2
1
Bypass
Standby
Bias
GND
Cb
7
TS4902
+
Vout 2
8
PIN CONNECTIONS
(top view)
TS4902IS-TS4902IST - MiniSO8
Standby
Bypass
V
IN
+
V
IN-
1
2
3
4
8
7
6
5
V
OUT
2
GND
V
CC
V
OUT1
TS4902ID-TS4902IDT - SO8
Standby
Bypass
V
IN
+
V
IN-
1
2
3
4
8
7
6
5
V
OUT
2
GND
V
CC
V
OUT1
TYPICAL APPLICATION SCHEMATIC
Cfeed
Rfeed
VCC
6
Audio
Input
Cin
3
Vin+
+
RL
8 Ohms
Cs
Rin
4
Vin-
-
V
C
Vout 1
5
ST
•
D
•
Rstb
S =
MiniSO Package (MiniSO) is only available in Tape & Reel (ST)
D =
Small Outline Package (SO) - also available in Tape & Reel (DT)
January 2002
1/19
TS4902
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
i
T
oper
T
stg
T
j
R
thja
Supply voltage
1)
Input Voltage
2)
Operating Free Air Temperature Range
Storage Temperature
Maximum Junction Temperature
Thermal Resistance Junction to Ambient
3)
SO8
MiniSO8
Power Dissipation
4)
Parameter
Value
6
G
ND
to V
CC
-40 to + 85
-65 to +150
150
175
215
See the power derating
curves Fig 20.
2
200
Class A
250
Unit
V
V
°C
°C
°C
°C/W
Pd
ESD
Human Body Model
ESD
Machine Model
Latch-up Latch-up Immunity
Lead Temperature (soldering, 10sec)
1.
2.
3.
4.
All voltages values are measured with respect to the ground pin.
The magnitude of input signal must never exceed V
CC
+ 0.3V / G
ND
- 0.3V
Device is protected in case of over temperature by a thermal shutdown active @ 150°C.
Exceeding the power derating curves during a long period, will cause abnormal operation.
kV
V
°C
OPERATING CONDITIONS
Symbol
V
CC
V
ICM
V
STB
R
L
R
thja
Supply Voltage
Common Mode Input Voltage Range
Standby Voltage Input :
Device ON
Device OFF
Load Resistor
Thermal Resistance Junction to Ambient
1)
SO8
MiniSO8
Parameter
Value
2.2 to 5.5
G
ND
to V
CC
- 1.5V
1.5
≤
V
STB
≤
V
CC
GND
≤
V
STB
≤
0.5
4 - 32
150
190
Unit
V
V
V
Ω
°C/W
1. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves)
2/19
TS4902
ELECTRICAL CHARACTERISTICS
V
CC
=
+5V,
GND =
0V,
T
amb
= 25°C (unless otherwise specified)
Symbol
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
M
GM
GBP
Parameter
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = GND, RL = 8Ω
Output Offset Voltage
No input signal, RL = 8Ω
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
Power Supply Rejection Ratio
2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
Phase Margin at Unity Gain
R
L
= 8Ω, C
L
= 500pF
Gain Margin
R
L
= 8Ω, C
L
= 500pF
Gain Bandwidth Product
R
L
= 8Ω
Min.
Typ.
6
10
5
0.7
0.15
77
70
20
2
Max.
8
1000
20
Unit
mA
nA
mV
W
%
dB
Degrees
dB
MHz
1. Standby mode is actived when Vstdby is tied to GND
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
V
CC
=
+3.3V,
GND =
0V,
T
amb
= 25°C (unless otherwise specified)
3)
Symbol
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
M
GM
GBP
Parameter
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = GND, RL = 8Ω
Output Offset Voltage
No input signal, RL = 8Ω
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
Power Supply Rejection Ratio
2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
Phase Margin at Unity Gain
R
L
= 8Ω, C
L
= 500pF
Gain Margin
R
L
= 8Ω, C
L
= 500pF
Gain Bandwidth Product
R
L
= 8Ω
Min.
Typ.
5.5
10
5
300
0.15
77
70
20
2
Max.
8
1000
20
Unit
mA
nA
mV
mW
%
dB
Degrees
dB
MHz
1. Standby mode is actived when Vstdby is tied to GND
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
3. All electrical values are made by correlation between 2.6V and 5V measurements
3/19
TS4902
ELECTRICAL CHARACTERISTICS
V
CC
=
2.6V,
GND =
0V,
T
amb
= 25°C (unless otherwise specified)
Symbol
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
M
GM
GBP
Parameter
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = GND, RL = 8Ω
Output Offset Voltage
No input signal, RL = 8Ω
Output Power
THD = 1% Max, f = 1kHz, RL = 8Ω
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8Ω
Power Supply Rejection Ratio
2)
f = 217Hz, RL = 8Ω, RFeed = 22KΩ, Vripple = 200mV rms
Phase Margin at Unity Gain
R
L
= 8Ω, C
L
= 500pF
Gain Margin
R
L
= 8Ω, C
L
= 500pF
Gain Bandwidth Product
R
L
= 8Ω
Min.
Typ.
5.5
10
5
180
0.15
77
70
20
2
Max.
8
1000
20
Unit
mA
nA
mV
mW
%
dB
Degrees
dB
MHz
1. Standby mode is actived when Vstdby is tied to GND
2. Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
Components
Rin
Cin
Rfeed
Cs
Cb
Cfeed
Rstb
Gv
Functional Description
Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also
forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin))
Input coupling capacitor which blocks the DC voltage at the amplifier input terminal
Feed back resistor which sets the closed loop gain in conjunction with Rin
Supply Bypass capacitor which provides power supply filtering
Bypass pin capacitor which provides half supply filtering
Low pass filter capacitor allowing to cut the high frequency
(low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed))
Pull-up resistor which fixes the right supply level on the standby pin
Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)
REMARKS
1.
All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF.
2.
The standby response time is about 1µs.
4/19
TS4902
Fig. 1 : Open Loop Frequency Response
0
60
Gain
Vcc = 5V
RL = 8
Ω
Tamb = 25
°
C
-20
-40
-60
Phase (Deg)
Fig. 2 : Open Loop Frequency Response
0
60
Gain
Vcc = 5V
ZL = 8
Ω
+ 560pF
Tamb = 25
°
C
-20
-40
-60
Phase (Deg)
40
Gain (dB)
40
Phase
Gain (dB)
Phase
20
-80
-100
-120
-80
-100
-120
20
0
-140
-160
0
-140
-160
-20
-180
-200
-20
-180
-200
-40
0.3
1
10
100
Frequency (kHz)
1000
10000
-220
-40
0.3
1
10
100
1000
Frequency (kHz)
10000
-220
Fig. 3 : Open Loop Frequency Response
80
60
40
Gain (dB)
Fig. 4 : Open Loop Frequency Response
80
60
40
Phase
20
0
-20
-40
0.3
Gain
Vcc = 3.3V
ZL = 8
Ω
+ 560pF
Tamb = 25
°
C
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
-200
-220
1
10
100
1000
Frequency (kHz)
10000
-240
Phase (Deg)
Phase (Deg)
0
Gain
Vcc = 33V
RL = 8
Ω
Tamb = 25
°
C
-20
-40
-60
-100
-120
-140
-160
-180
-200
-220
-240
Phase (Deg)
Phase
20
0
-20
-40
0.3
1
10
100
1000
Frequency (kHz)
10000
Fig. 5 : Open Loop Frequency Response
80
60
40
Gain (dB)
Fig. 6 : Open Loop Frequency Response
0
80
Gain
60
40
Phase (Deg)
Gain (dB)
Gain (dB)
-80
0
Vcc = 2.6V
ZL = 8
Ω
+ 560pF
Tamb = 25
°
C
-20
-40
-60
-80
Phase
-100
-120
-140
-160
-180
-200
-220
-240
Gain
Vcc = 2.6V
RL = 8
Ω
Tamb = 25
°
C
-20
-40
-60
-80
-100
-120
-140
-160
-180
-200
-220
-240
Phase
20
0
-20
-40
0.3
20
0
-20
-40
0.3
1
10
100
1000
Frequency (kHz)
10000
1
10
100
1000
Frequency (kHz)
10000
5/19
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
