performance improves as the signal swing is decreased.
+3V
2.26kΩ
374Ω
V
IN
OPA635
A low 5.6nV input voltage noise supports wide dynamic
range operation. Multiplexing or system power reduc-
tion can be achieved using the high-speed disable line
with the OPA635. Power dissipation can be reduced to
zero by taking the disable line High.
The OPA634 and OPA635 are available in an industry
standard SO-8 package. The OPA634 is also available in
an ultra-small SOT23-5 package, while the OPA635 is
available in the SOT23-6. Where lower supply current
and speed are required, consider the OPA631 and
OPA632.
RELATED PRODUCTS
SINGLES
Medium Speed, No Disable
With Disable
High Speed, No Disable
With Disable
OPA631
OPA632
OPA634
OPA635
DUALS
OPA2631
—
OPA2634
—
Disable
+3V
Pwrdn
ADS900
10-Bit
20Msps
22pF
DIS
100Ω
562Ω
750Ω
International Airport Industrial Park • Mailing Address: PO Box 11400, Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 • Tel: (520) 746-1111
Short-Circuit Current (output shorted to either supply)
Closed-Loop Output Impedance
G = +2, f
≤
100kHz
DISABLE (OPA635 only)
On Voltage (device enabled Low)
Off Voltage (device disabled High)
On Disable Current (DIS pin)
Off Disable Current (DIS pin)
Disabled Quiescent Current
Disable Time
Enable Time
Off Isolation
POWER SUPPLY
Minimum Operating Voltage
Maximum Operating Voltage
Maximum Quiescent Current
Minimum Quiescent Current
Power Supply Rejection Ratio (PSRR)
THERMAL CHARACTERISTICS
Specification: U, N
Thermal Resistance
U
SO-8
N
SOT23-5, SOT23-6
f = 5MHz, Input to Output
Input Referred
NOTE: (1) Test Levels: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information.
®
OPA634, OPA635
2
SPECIFICATIONS: V
S
= +3V
At T
A
= 25°C, G = +2 and R
L
= 150Ω to V
S
/2, unless otherwise noted (see Figure 2).
OPA634U, N
OPA635U, N
TYP
+25
°
C
+25
°
C
GUARANTEED
0
°
C to
70
°
C
–40
°
C to
+85
°
C
MIN/ TEST
MAX LEVEL
(1)
PARAMETER
AC PERFORMANCE (Figure 2)
Small-Signal Bandwidth
CONDITIONS
G = +2, V
O
≤
0.5Vp-p
G = +5, V
O
≤
0.5Vp-p
G = +10, V
O
≤
0.5Vp-p
G
≥
+10
V
O
≤
0.5Vp-p
1V Step
0.5V Step
0.5V Step
1V Step
V
O
= 1Vp-p, f = 5MHz
f > 1MHz
f > 1MHz
UNITS
Gain Bandwidth Product
Peaking at a Gain of +1
Slew Rate
Rise Time
Fall Time
Settling Time to 0.1%
Spurious Free Dynamic Range
Input Voltage Noise
Input Current Noise
DC PERFORMANCE
Open-Loop Voltage Gain
Input Offset Voltage
Average Offset Voltage Drift
Input Bias Current
Input Offset Current
Input Offset Current Drift
INPUT
Least Positive Input Voltage
Most Positive Input Voltage
Common-Mode Rejection (CMRR)
Input Impedance
Differential-Mode
Common-Mode
OUTPUT
Least Positive Output Voltage
Most Positive Output Voltage
110
39
16
150
5
215
2.8
3.0
14
65
5.6
2.8
67
1.5
—
25
0.6
—
–0.25
1.8
75
10 || 2.1
400 || 1.2
77
24
12
100
—
160
4.3
4.4
30
56
6.2
3.7
64
4
—
42
2
—
–0.1
1.6
67
—
—
0.043
0.08
2.86
2.70
35
30
—
—
0.5
1.9
100
—
30
—
—
—
2.7
10.5
11.1
10.1
49
65
20
10
85
—
123
4.5
4.6
32
52
7.3
4.2
60
5
—
55
2.3
—
–0.05
1.55
64
—
—
0.045
0.09
2.85
2.69
30
27
—
—
0.5
2.1
110
—
40
—
—
—
2.7
10.5
11.4
8.6
45
58
19
8
80
—
82
6.3
6.0
38
47
7.7
4.4
56
6
46
60
4
40
–0.01
1.5
61
—
—
0.06
0.13
2.45
2.65
12
10
—
—
0.5
2.2
110
—
50
—
—
—
2.7
10.5
11.6
8.0
44
MHz
MHz
MHz
MHz
dB
V/µs
ns
ns
ns
dBc
nV/√Hz
pA/√Hz
dB
mV
µV/°C
µA
µA
nA/°C
V
V
dB
kΩ || p
kΩ || p
V
V
V
V
mA
mA
mA
Ω
V
V
µA
µA
µA
ns
ns
dB
V
V
mA
mA
dB
°C
°C/W
°C/W
min
min
min
min
typ
min
max
max
max
min
max
max
min
max
max
max
max
max
max
min
min
typ
typ
max
max
min
min
min
min
typ
typ
min
max
max
typ
max
typ
typ
typ
min
max
max
min
min
typ
typ
typ
B
B
B
B
C
B
B
B
B
B
B
B
A
A
B
B
B
B
B
A
A
C
C
A
A
A
A
A
A
C
C
A
A
A
C
A
C
C
C
A
A
A
A
A
C
C
C
V
CM
= 1.0V
V
CM
= 1.0V
Input Referred
R
L
= 1kΩ to 1.5V
R
L
= 150Ω to 1.5V
R
L
= 1kΩ to 1.5V
R
L
= 150Ω to 1.5V
Current Output, Sourcing
Current Output, Sinking
Short Circuit Current (output shorted to either supply)
Closed-Loop Output Impedance
Figure 2, f < 100kHz
DISABLE (OPA635 only)
On Voltage (device enabled Low)
Off Voltage (device disabled High)
On Disable Current (DIS pin)
Off Disable Current (DIS pin)
Disabled Quiescent Current
Disable Time
Enable Time
Off Isolation
POWER SUPPLY
Minimum Operating Voltage
Maximum Operating Voltage
Maximum Quiescent Current
Minimum Quiescent Current
Power Supply Rejection Ratio (PSRR)
THERMAL CHARACTERISTICS
Specification: U, N
Thermal Resistance
U
SO-8
N
SOT23-5, SOT23-6
0.035
0.06
2.9
2.8
45
65
100
0.2
1.0
1.8
66
0
0
100
60
70
—
—
10.8
10.8
50
–40 to +85
125
150
f = 5MHz, Input to Output
Input Referred
NOTE: (1) Test Levels: (A) 100% tested at 25°C. Over temperature limits by characterization and simulation. (B) Limits set by characterization and simulation.
(C) Typical value only for information.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no
responsibility for the use of this information, and all use of such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice.
No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product
for use in life support devices and/or systems.
®
3
OPA634, OPA635
ABSOLUTE MAXIMUM RATINGS
Power Supply ................................................................................ +11V
DC
Internal Power Dissipation .................................... See Thermal Analysis
Differential Input Voltage ..................................................................
±1.2V
Input Voltage Range ............................................................... –0.5 to +V
S
Storage Temperature Range: P, U, N ........................... –40°C to +125°C
Lead Temperature (soldering, 10s) .............................................. +300°C
Electrostatic discharge can cause damage ranging from perfor-
mance degradation to complete device failure. Burr-Brown Corpo-
ration recommends that all integrated circuits be handled and stored
using appropriate ESD protection methods.
ESD damage can range from subtle performance degradation to
complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes
could cause the device not to meet published specifications.
PIN CONFIGURATIONS
Top View—OPA634, OPA635
SO-8
NC
Inverting Input
Non-Inverting Input
GND
1
2
3
4
8
7
6
5
DIS (OPA635 only)
+V
S
Output
NC
Top View—OPA634
SOT23-5
Top View—OPA635
SOT23-6
Output
1
6
+V
S
Output
1
6
+V
S
GND
2
GND
2
5
DIS
Non-Inverting Input
3
4
Inverting Input
Non-Inverting Input
3
4
Inverting Input
6
5
6
4
B34
1
2
3
A35
1
2
Pin Orientation/Package Marking
Pin Orientation/Package Marking
PACKAGE/ORDERING INFORMATION
PACKAGE
DRAWING
NUMBER
(1)
182
SPECIFIED
TEMPERATURE
RANGE
–40°C to +85°C
PACKAGE
MARKING
OPA635U
ORDERING
NUMBER
(2)
OPA635U
OPA635U/2K5
OPA635N/250
OPA635N/3K
OPA634U
OPA634U/2K5
OPA634N/250
OPA634N/3K
TRANSPORT
MEDIA
Rails
Tape and Reel
Tape and Reel
Tape and Reel
Rails
Tape and Reel
Tape and Reel
Tape and Reel
PRODUCT
OPA635U
PACKAGE
SO-8 Surface-Mount
"
OPA635N
"
6-Lead SOT23-6
"
332
"
–40°C to +85°C
"
A35
"
OPA634U
"
SO-8 Surface-Mount
"
182
"
–40°C to +85°C
"
OPA634U
"
OPA634N
"
5-Lead SOT23-5
"
331
"
–40°C to +85°C
"
B34
"
"
"
"
"
NOTES: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book. (2) Models with a slash (/) are
available only in Tape and Reel in the quantities indicated (e.g., /2K5 indicates 2500 devices per reel). Ordering 3000 pieces of “OPA635N/3K” will get a single
3000-piece Tape and Reel. For detailed Tape and Reel mechanical information, refer to Appendix B of Burr-Brown IC Data Book.
OP-AMP, 6000 uV OFFSET-MAX, 150 MHz BAND WIDTH, PDSO8
Wideband, Single Supply OPERATIONAL AMPLIFIERS
OP-AMP, 6000 uV OFFSET-MAX, 150 MHz BAND WIDTH, PDSO8
ECONOLINE: RB & RA - Dual Output from a Single Input Rail- Power Sharing on Output- Industry Standard Pinout- 1kVDC & 2kVDC Isolation- Custom Solutions Available- UL94V-0 Package Material- Efficiency to 85%
复杂 IC 不仅吸引了更多系统，而且还吞食着设计者用于建立、评估与校准芯片的测试设备。 芯片设计者正开始在自己的复杂 IC上设计测试与测量仪器。在IC中设计测试仪器的潮流开始于CPU核心与总线的数字调试硬件。现在，设计者也在高速I/O块中建立分析仪器。设计者正在高频芯片的内部作业中集成更复杂的模拟与RF测试仪器，如读取通道IC。 这只是尺度问题。随着系统级 IC 越来越大而复杂...[详细]
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