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MAX5725

产品描述Ultra-Small, Octal-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface
文件大小2MB,共35页
制造商Maxim(美信半导体)
官网地址https://www.maximintegrated.com/en.html
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MAX5725概述

Ultra-Small, Octal-Channel, 8-/10-/12-Bit Buffered Output DACs with Internal Reference and SPI Interface

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MAX5723/MAX5724/
MAX5725
General Description
Ultra-Small, Octal-Channel, 8-/10-/12-Bit
Buffered Output DACs with Internal
Reference and SPI Interface
Benefits and Features
Eight High-Accuracy DAC Channels
• 12-Bit Accuracy Without Adjustment
• LSB INL Buffered Voltage Output
±1
Guaranteed Monotonic Over All Operating
Conditions
Independent Mode Settings for Each DAC
Three Precision Selectable Internal References
2.048V, 2.500V, or 4.096V
Internal Output Buffer
Rail-to-Rail Operation with External Reference
• 4.5µs Settling Time
Outputs Directly Drive 2kΩ Loads
Small 6.5mm x 4.4mm 20-Pin TSSOP or Ultra-Small
2.5mm x 2.3mm 20-Bump WLP Package
Wide 2.7V to 5.5V Supply Range
Separate 1.8V to 5.5V V
DDIO
Power-Supply Input
Fast 50MHz 4-Wire SPI/QSPI/MICROWIRE/DSP-
Compatible Serial Interface
Programmable Interface Watchdog Timer
Pin-Selectable Power-On-Reset to Zero-Scale or
Midscale DAC Output
LDAC
and
CLR
for Asynchronous DAC Control
Three Selectable Power-Down Output Impedances
1kΩ, 100kΩ, or High Impedance
The MAX5723/MAX5724/MAX5725 8-channel, low-power,
8-/10-/12-bit, voltage-output digital-to-analog converters
(DACs) include output buffers and an internal 3ppm/°C
reference that is selectable to be 2.048V, 2.500V, or
4.096V. The MAX5723/MAX5724/MAX5725 accept a
wide supply voltage range of 2.7V to 5.5V with extremely
low power (6mW) consumption to accommodate most
low-voltage applications. A precision external reference
input allows rail-to-rail operation and presents a 100kI
(typ) load to an external reference.
The MAX5723/MAX5724/MAX5725 have a fast 50MHz,
4-wire SPI/QSPI™/MICROWIRE/DSP-compatible serial
interface that operates at clock rates up to 50MHz. The
DAC output is buffered and has a low supply current
of less than 250FA per channel and a low offset error
of
Q0.5mV
(typ). On power-up, the MAX5723/MAX5724/
MAX5725 reset the DAC outputs to zero or midscale
based on the status of M/Z logic input, providing flex-
ibility for a variety of control applications. The internal
reference is initially powered down to allow use of an
external reference. The MAX5723/MAX5724/MAX5725
allow simultaneous output updates using software LOAD
commands or the hardware load DAC logic input (LDAC).
The MAX5723/MAX5724/MAX5725 feature a program-
mable watchdog function which can be enabled to moni-
tor the I/O interface for activity and integrity.
A clear logic input (CLR) allows the contents of the CODE
and the DAC registers to be cleared asynchronously and
simultaneously sets the DAC outputs to the program-
mable default value. The MAX5723/MAX5724/MAX5725
are available in a 20-pin TSSOP and an ultra-small,
20-bump WLP package and are specified over the -40NC
to +125NC temperature range.
Functional Diagram
V
DDIO
V
DD
REF
INTERNAL REFERENCE/
EXTERNAL BUFFER
CSB
SCLK
DIN
DOUT
CLR
LDAC
CODE
IRQ
WATCHDOG
TIMER
CLEAR/
RESET
(GATE/
CLEAR/
RESET)
SPI
SERIAL
INTERFACE
CODE
REGISTER
DAC
LATCH
8 -/10-/12-BIT
DAC
MAX5723
MAX5724
MAX5725
Applications
1 OF 8 DAC CHANNELS
Programmable Voltage and Current Sources
Gain and Offset Adjustment
Automatic Tuning and Optical Control
Power Amplifier Control and Biasing
Process Control and Servo Loops
Portable Instrumentation
BUFFER
OUT0
OUT1
OUT2
OUT3
OUT4
LOAD
100kI
DAC CONTROL LOGIC
POWER-DOWN
1kI
OUT5
OUT6
OUT7
M/Z
POR
GND
QSPI is a trademark of Motorola, Inc.
µMAX is a registered trademark of Maxim Integrated Products,
Inc.
Ordering Information
appears at end of data sheet.
19-6243; Rev 2; 2/13

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