for lithium-ion (Li+) batteries in handheld and portable
equipment. The MAX17058 operates with a single Li+
cell and the MAX17059 with two Li+ cells in series.
The ICs use the sophisticated Li+ battery-modeling
algorithm ModelGaugeK to track the battery relative
state-of-charge (SOC) continuously over a widely varying
charge/discharge conditions. The ModelGauge algo-
rithm eliminates current-sense resistor and battery-learn
cycles required by other fuel gauges. Temperature
compensation is implemented using the system micro-
controller.
On battery insertion, the ICs debounce initial voltage
measurements to improve the initial SOC estimate,
allowing them to be located on system side. SOC and
voltage information is accessed using the I
2
C interface.
The ICs are available in a tiny 0.9mm x 1.7mm, 8-bump
wafer-level package (WLP) or a 2mm x 2mm, 8-pin TDFN
package.
Features and Benefits
S
MAX17058: 1 Cell, MAX17059: 2 Cells
S
Precision ±7.5mV/Cell Voltage Measurement
S
ModelGauge Algorithm
Provides Accurate State-of-Charge
Compensates for Temperature/Load Variation
Does Not Accumulate Errors, Unlike Coulomb
Counters
Eliminates Learning
Eliminates Current-Sense Resistor
S
Low Quiescent Current: 23µA
S
Battery-Insertion Debounce
Best of 16 Samples Estimates Initial SOC
S
Programmable Reset for Battery Swap
2.28V to 3.48V Range
S
Low SOC Alert Indicator
S
I
2
C Interface
Ordering Information
appears at end of data sheet.
Applications
Wireless Handsets
Smartphones/PDAs
Tablets and Handheld Computers
Portable Game Players
e-Readers
Digital Still and Video Cameras
Portable Medical Equipment
Simplified Operating Circuit
MAX17058
V
DD
ONLY ONE
EXTERNAL
COMPONENT
CELL
CTG
GND
ALRT
SDA
SCL
QSTRT
SYSTEM
µP
ModelGauge is a trademark of Maxim Integrated Products, Inc.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-6172; Rev 4; 6/13
MAX17058/MAX17059
1-Cell /2-Cell Li+ ModelGauge ICs
ABSOLUTE MAXIMUM RATINGS
CELL to GND.........................................................-0.3V to +12V
All Pins Excluding CELL to GND ............................-0.3V to +6V
Continuous Sink Current, SDA,
ALRT
................................20mA
Operating Temperature Range .......................... -40NC to +85NC
Storage Temperature Range............................ -55NC to +125NC
Lead Temperature (TDFN only) (soldering, 10s) ...........+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(2.5V < V
DD
< 4.5V, -20NC < T
A
< +70NC, unless otherwise noted. Typical values are at T
A
= +25NC.) (Note 1)
PARAMETER
Supply Voltage
Fuel-Gauge SOC Reset
(VRESET Register)
Data I/O Pins
Supply Current
Time Base Accuracy
ADC Sample Period
Voltage Error
Voltage-Measurement Resolution
Voltage-Measurement Range
SDA, SCL, QSTRT Input Logic-High
SDA, SCL, QSTRT Input Logic-Low
SDA,
ALRT
Output Logic-Low
SDA, SCL Bus Low-Detection
Current
Bus Low-Detection Timeout
V
IH
V
IL
V
OL
I
PD
t
SLEEP
I
OL
= 4mA
V
SDA
= V
SCL
= 0.4V (Note 5)
(Note 6)
1.75
0.2
MAX17058: V
DD
pin
MAX17059: CELL pin
2.5
5
1.4
0.5
0.4
0.4
2.5
V
ERR
SYMBOL
V
DD
V
RST
SCL, SDA,
ALRT
I
DD0
I
DD1
t
ERR
(Note 2)
Configuration range, in 40mV steps
Trimmed at 3V
(Note 2)
Sleep mode, T
A
< +50NC
Active mode
Active mode (Note 3)
Active mode
V
CELL
= 3.6V, T
A
= +25NC (Note 4)
-20NC < T
A
< +70NC
-7.5
-20
1.25
5
10
-3.5
CONDITIONS
MIN
2.5
2.28
2.85
-0.3
0.5
23
Q1
250
+7.5
+20
3.0
TYP
MAX
4.5
3.48
3.15
+5.5
2
40
+3.5
UNITS
V
V
V
V
FA
%
ms
mV/cell
mV/cell
V
V
V
V
FA
s
ELECTRICAL CHARACTERISTICS (I
2
C INTERFACE)
(2.5V < V
DD
< 4.5V, -20NC < T
A
< +70NC, unless otherwise noted.) (Note 1)
PARAMETER
SCL Clock Frequency
Bus Free Time Between a STOP and
START Condition
START Condition (Repeated) Hold
Time
Low Period of SCL Clock
SYMBOL
f
SCL
t
BUF
t
HD:STA
t
LOW
(Note 8)
(Note 7)
CONDITIONS
MIN
0
1.3
0.6
1.3
TYP
MAX
400
UNITS
kHz
Fs
Fs
Fs
Maxim Integrated
2
MAX17058/MAX17059
1-Cell /2-Cell Li+ ModelGauge ICs
ELECTRICAL CHARACTERISTICS (I
2
C INTERFACE) (continued)
(2.5V < V
DD
< 4.5V, -20NC < T
A
< +70NC, unless otherwise noted.) (Note 1)
PARAMETER
High Period of SCL Clock
Setup Time for a Repeated START
Condition
Data Hold Time
Data Setup Time
Rise Time of Both SDA and SCL
Signals
Fall Time of Both SDA and SCL
Signals
Setup Time for STOP Condition
Spike Pulse Widths Suppressed by
Input Filter
Capacitive Load for Each Bus Line
SCL, SDA Input Capacitance
Note 1:
SYMBOL
t
HIGH
t
SU:STA
t
HD:DAT
t
SU:DAT
t
R
t
F
t
SU:STO
t
SP
C
B
C
B,IN
(Note 11)
(Note 12)
(Notes 9, 10)
(Note 9)
CONDITIONS
MIN
0.6
0.6
0
100
20 + 0.1C
B
20 + 0.1C
B
0.6
0.6
50
400
60
300
300
0.9
TYP
MAX
UNITS
Fs
Fs
Fs
ns
ns
ns
Fs
ns
pF
pF
Specifications are tested 100% at T
A
= +25NC. Limits over the operating range are guaranteed by design and
characterization.
Note 2:
All voltages are referenced to GND.
Note 3:
Test is performed on unmounted/unsoldered ports.
Note 4:
The voltage is trimmed and verified with 16x averaging.
Note 5:
This current is always present.
Note 6:
The IC enters sleep mode after SCL < V
IL
and SDA < V
IL
for longer than 2.5s.
Note 7:
Timing must be fast enough to prevent the IC from entering sleep mode due to bus low for period > t
SLEEP
.
Note 8:
f
SCL
must meet the minimum clock low time plus the rise/fall times.
Note 9:
The maximum t
HD:DAT
has to be met only if the device does not stretch the low period (t
LOW
) of the SCL signal.
Note 10:
This device internally provides a hold time of at least 100ns for the SDA signal (referred to the V
IH,MIN
of the SCL signal)
to bridge the undefined region of the falling edge of SCL.
Note 11:
Filters on SDA and SCL suppress noise spikes at the input buffers and delay the sampling instance.
Note 12:
C
B
is total capacitance of one bus line in pF.
SDA
t
F
t
LOW
t
R
t
SU:DAT
t
F
t
HD:STA
t
SP
t
R
t
BUF
SCL
t
HD:STA
S
t
HD:DAT
t
SU:STA
Sr
t
SU:STO
P
S
Figure 1. I
2
C Bus Timing Diagram
Maxim Integrated
3
MAX17058/MAX17059
1-Cell /2-Cell Li+ ModelGauge ICs
Typical Operating Characteristics
(T
A
= +25NC, battery is Sanyo UF504553F, unless otherwise noted.)
QUIESCENT CURRENT vs. SUPPLY
VOLTAGE (ACTIVE MODE)
MAX17058 toc01
VOLTAGE ADC ERROR vs. TEMPERATURE
15
10
5
0
-5
-10
-15
-20
V
CELL
= 3.6V
V
CELL
= 2.5V
V
CELL
= 4.5V
MAX17058 toc02
40
35
QUIESCENT CURRENT (µA)
30
25
20
15
10
5
0
2.5
3.0
3.5
V
CELL
(V)
REFERENCE SOC
100
4.0
T
A
= -20°C
T
A
= +25°C
T
A
= +70°C
20
VOLTAGE ADC ERROR (mV/CELL)
4.5
-20
-5
10
25
40
55
70
TEMPERATURE (°C)
ERROR
10
REFERENCE SOC
100
SOC ACCURACY T
A
= 0°C
MODELGAUGE SOC
SOC ACCURACY T
A
= +20°C
MODELGAUGE
ERROR
10
MAX17058 toc03
MAX17058 toc04
75
SOC (%)
5
ERROR (%)
SOC (%)
75
5
ERROR (%)
50
0
50
0
25
-5
25
-5
0
0
2
4
6
8
10
TIME (Hr)
-10
0
-2
0
2
4
TIME (Hr)
6
8
10
-10
REFERENCE SOC
100
SOC ACCURACY T
A
= +40°C
MODELGAUGE SOC
ERROR
10
MAX17058 toc05
75
SOC (%)
5
ERROR (%)
50
0
25
-5
0
0
2
4
6
8
10
TIME (Hr)
-10
Maxim Integrated
4
MAX17058/MAX17059
1-Cell /2-Cell Li+ ModelGauge ICs
Typical Operating Characteristics (continued)
(T
A
= +25NC, battery is Sanyo UF504553F, unless otherwise noted.)
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