INTEGRATED CIRCUITS
DATA SHEET
TSA6060
Fast radio tuning PLL frequency
synthesizer
Product specification
Supersedes data of April 1994
File under Integrated Circuits, IC01
1995 Nov 23
Philips Semiconductors
Product specification
Fast radio tuning PLL frequency
synthesizer
FEATURES
•
On-chip AM and FM prescalers with high input
sensitivity
•
On-chip high-performance one-input-two-output, tuning
voltage amplifier for the AM and FM loop filters
•
On-chip two-level current amplifier (charge pump) for
loop gain adjustment
•
One reference oscillator (4 or 8 MHz) for both AM
and FM
•
High-speed tuning provided by a powerful digital
memory phase detector
•
40 kHz output reference frequency for communication
between the FM/IF system and microcontroller-based
tuning interface IC (TEA6100)
•
Oscillator frequency range of 500 kHz to 30 MHz and
30 MHz to 200 MHz
•
Four selectable reference frequencies:
1, 10, 25 or 50 kHz, for both tuning ranges
•
I
2
C-bus interface to a microcontroller
•
Software controlled band switch output
•
In-lock detector output.
QUICK REFERENCE DATA
SYMBOL
V
CC1
V
CC2
I
CC1
I
CC2
f
iAMmax
f
iAMmin
f
iFMmax
f
iFMmin
V
iAM(rms)
V
iFM(rms)
P
tot
T
amb
PARAMETER
supply voltage (pin 3)
supply voltage (pin 16)
supply current (pin 3)
supply current (pin 16)
maximum AM input frequency
minimum AM input frequency
maximum FM input frequency
minimum FM input frequency
AM input voltage (RMS value)
FM input voltage (RMS value)
total power dissipation
operating ambient temperature
V
iFM
= 0 V; f
i
< 15 MHz
V
iAM
= 0 V
no outputs loaded
no outputs loaded
CONDITIONS
MIN.
4.5
−
0.7
30
−
200
−
30
20
−
−40
TYP.
5.0
15
1.0
−
−
−
−
−
−
100
−
APPLICATIONS
•
FM mains and car radios
•
VHF receivers 30 to 200 MHz.
GENERAL DESCRIPTION
TSA6060
The TSA6060 is a frequency synthesizer manufactured in
SUBILO-N technology (components laterally separated by
oxide). The device performs all the tuning functions of a
PLL radio tuning system.
The IC is designed for application in all types of
radio receivers.
MAX.
5.5
12.0
−
1.5
−
500
−
30
500
300
−
+85
V
V
UNIT
V
CC1
+ 1 8.5
mA
mA
MHz
kHz
MHz
MHz
mV
mV
mW
°C
ORDERING INFORMATION
TYPE
NUMBER
TSA6060
PACKAGE
NAME
DIP16
DESCRIPTION
plastic dual in-line package; 16 leads (300 mil); long body
plastic small outline package; 16 leads; body width 7.5 mm
VERSION
SOT38-1
SOT162-1
TSA6060T SO16
1995 Nov 23
2
Philips Semiconductors
Product specification
Fast radio tuning PLL frequency
synthesizer
BLOCK DIAGRAM
TSA6060
Fig.1 Block diagram.
1995 Nov 23
3
Philips Semiconductors
Product specification
Fast radio tuning PLL frequency
synthesizer
PINNING
SYMBOL
INCLK
XTAL
V
CC1
V
EE
FM
I
DEC
AM
I
BS
f
ref
SDA
SCL
AS
FM
O
LOOP
I
AM
O
V
CC2
PIN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
DESCRIPTION
in-lock detector output
crystal reference oscillator input
supply voltage (PLL supply 1)
ground
FM VCO input
prescaler decoupling
AM VCO input
band switch output
40 kHz reference output
serial data input (I
2
C-bus)
serial clock input (I
2
C-bus)
address select input (I
2
C-bus)
FM output for external loop filter
tuning voltage amplifier input
AM output for external loop filter
supply voltage (PLL supply 2)
Fig.2 Pin configuration.
TSA6060
FUNCTIONAL DESCRIPTION
The TSA6060 contains the following parts:
•
Separate input amplifiers for the AM and FM VCO
signals.
•
A 17-bit programmable counter.
•
A digital memory phase detector.
•
A reference frequency channel which contains a 4 MHz
or 8 MHz crystal oscillator which is followed by a
reference counter. The reference frequency can be
either 1, 5, 10 or 50 kHz and is applied to the digital
memory phase detector. The reference counter can also
output a 40 kHz reference frequency to pin 9 for
communication between the FM/IF system and the
microcontroller-based tuning interface IC (TEA6100).
•
A programmable current amplifier (charge pump) which
consists of a 25 mA and a 500 mA current source. This
allows adjustment of the loop gain thereby providing
high-current high-speed tuning and low-current stable
tuning.
•
A one-input-two-output tuning voltage amplifier. One
output is connected to the external AM loop filter and the
other output to the external FM loop filter. Under
software control, the AM output is switched to a low
impedance to ground by the FM/AM switch in the FM
position. The FM output is switched to a low impedance
to ground by the AM/FM switch in the AM position. The
outputs can deliver a tuning voltage of up to 10.5 V.
•
An I
2
C-bus interface with data latches and control logic.
The I
2
C-bus is intended for communication between
microcontrollers and different ICs or modules. Detailed
information concerning the I
2
C-bus specification is
available on request.
•
A software controlled band switch output.
Controls
The TSA6060 is controlled via the 2-wire I
2
C-bus.
For programming there is one module address, a logic 0
(R/W bit) and four data bytes. The module address
contains an address select bit (AS) which enables two
TSA6060s to be operated in one system.
The auto-increment facility of the I
2
C-bus allows
programming of the TSA6060 within one transmission
(address + 4 data bytes).
The TSA6060 can also be partially programmed.
Transmission must then be ended by a STOP condition.
1995 Nov 23
4
Philips Semiconductors
Product specification
Fast radio tuning PLL frequency
synthesizer
TSA6060
The bit organization of the 4 data bytes is shown in Fig.3. Further information is given in Tables 2, 3, 4 and 5.
The bits S0 to S16 (DB0: D7 to D1; DB1: D7 to D0; DB2: D1 to D0) together with bit FM/AM (DB2: D5) are used to set
the divider of the input frequency at inputs AM
I
(pin 7) or FM
I
(pin 5). If the system is in-lock the following is valid, as
shown in Table 1.
Table 1
System-in-lock (note 1).
INPUT FREQUENCY (f
i
)
(S2
×
2
0
+ S3
×
2
1
..... + S15
×
2
13
+ S16
×
2
14
)
×
f
ref
(S0
×
2
0
+ S1
×
2
1
..... + S15
×
2
15
+ S16
×
2
16
)
×
f
ref
INPUT
AM
FM
FM/AM
0
1
Note
1. The minimum dividing ratio for the AM mode is 2
6
= 64 and for the FM mode is 2
8
= 256.
Table 2
Bit CP is used to control the charge pump
current (DB0: D0).
CP
0
1
Table 3
CURRENT
LOW
HIGH
Bits REF1 and REF2 are used to set the
reference frequency applied to the phase
detector (DB2: D7 to D6).
REF2
0
1
0
1
REFERENCE
FREQUENCY (kHZ)
1
10
25
50
Table 5
Bit BS controls the open-collector band switch
output (DB2: D2).
BS
1
0
BAND SWITCH OUTPUT
sink current
floating
The bit 8/4 MHz controls a divide-by-1/divide-by-2 divider
cell in the reference oscillator section. This allows the use
of a 4 MHz or 8 MHz crystal.
Table 6
T3
0
1
0
1
0
1
1
Test mode.
T2
X
0
1
1
0
1
0
T1
0
1
1
1
1
X
X
normal
CP source
CP sink
CP 3-state
CP sink + source
BS = main divider output
BS = reference divider output
FUNCTION
REF1
0
0
1
1
Table 4
Bit FM/AM OPAMP controls the switch AM/FM,
FM/AM in the tuning voltage amplifier circuits
(DB2: D4).
SWITCH
FM/AM
closed
open
AM/FM
open
closed
FM/AM
OPERATIONAL
AMPLIFIER
1
0
The data byte DB3 must be set to 0.....0. It is also used for
test purposes (see Fig.3)).
1995 Nov 23
5
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