Freescale Semiconductor
Data Sheet: Advance Information
Document Number: MC56F8455X
Rev. 2, 06/2012
MC56F8455x Advance
Information
MC56F8455X
Supports the 56F84553VLH,
56F84550VLF, 56F84543VLH,
56F84540VLF
• Analog
– Two high-speed, 8-channel, 12-bit ADCs with
dynamic x2, x4 programmable amplifier
– One 20-channel, 16-bit ADC
– Up to four analog comparators with integrated 6-bit
DAC references
– One 12-bit DAC
• PWMs and timers
– One eFlexPWM module with up to 24 PWM
outputs, including 8 channels with high resolution
NanoEdge placement
– Two 16-bit quad timer (2 x 4 16-bit timers)
– Two Periodic Interval Timers (PITs)
– Two Programmable Delay Blocks (PDBs)
• Communication interfaces
– Two high-speed queued SCI (QSCI) modules with
LIN slave functionality
– Two queued SPI (QSPI) modules
– Two SMBus-compatible I2C ports
– One flexible controller area network (FlexCAN)
module
• Security and integrity
– Cyclic Redundancy Check (CRC) generator
– Computer operating properly (COP) watchdog
– External Watchdog Monitor (EWM)
• Clocks
– Two on-chip relaxation oscillators: 8 MHz (400 kHz
at standby mode) and 32 kHz
– Crystal / resonator oscillator
Features
• This family of digital signal controllers (DSCs) is
based on the 32-bit 56800EX core. Each device
combines, on a single chip, the processing power of a
DSP and the functionality of an MCU with a flexible
set of peripherals to support many target applications:
– Industrial control
– Home appliances
– Smart sensors
– Fire and security systems
– Switched-mode power supply and power
management
– Uninterruptible Power Supply (UPS)
– Solar and wind power generator
– Power metering
– Motor control (ACIM, BLDC, PMSM, SR, stepper)
– Handheld power tools
– Circuit breaker
– Medical device/equipment
– Instrumentation
– Lighting
• DSC based on 32-bit 56800EX core
– Up to 80 MIPS at 80 MHz core frequency
– DSP and MCU functionality in a unified, C-efficient
architecture
• On-chip memory
– Up to 128 KB (96 KB + 32 KB) flash memory,
including up to 32 KB FlexNVM
– Up to 16 KB RAM
– Up to 2 KB FlexRAM with EEE capability
– 80 MHz program execution from both internal flash
memory and RAM
– On-chip flash memory and RAM can be mapped
into both program and data memory spaces
This document contains information on a new product. Specifications and
information herein are subject to change without notice.
© 2012 Freescale Semiconductor, Inc.
Preliminary
General Business Information
• System
– DMA controller
– Integrated power-on reset (POR) and low-voltage interrupt (LVI) and brown-out reset module
– Inter-module crossbar connection
– JTAG/enhanced on-chip emulation (EOnCE) for unobtrusive, real-time debugging
• Operating characteristics
– Single supply: 3.0 V to 3.6 V
– 5 V–tolerant I/O
• LQFP packages:
– 48-pin
– 64-pin
MC56F8455x Advance Information Data Sheet, Rev. 2, 06/2012.
2
Preliminary
General Business Information
Freescale Semiconductor, Inc.
Table of Contents
1
Overview.................................................................................4
1.1
1.2
1.3
1.4
1.5
1.6
1.7
2
3
MC56F844x/5x/7x Product Family................................4
56800EX 32-bit Digital Signal Controller Core..............5
Operation Parameters...................................................6
On-Chip Memory and Memory Protection.....................6
Interrupt Controller........................................................7
Peripheral highlights......................................................7
Block Diagrams.............................................................13
7
6.1
6.2
6.3
6.4
Thermal handling ratings...............................................22
Moisture handling ratings..............................................22
ESD handling ratings.....................................................22
Voltage and current operating ratings...........................23
General...................................................................................24
7.1
7.2
7.3
7.4
7.5
General Characteristics.................................................24
AC Electrical Characteristics.........................................25
Nonswitching electrical specifications...........................26
Switching specifications................................................31
Thermal specifications...................................................32
Signal groups..........................................................................16
Ordering parts.........................................................................16
3.1
Determining valid orderable parts.................................16
8
Peripheral operating requirements and behaviors..................34
8.1
8.2
8.3
8.4
8.5
8.6
8.7
Core modules................................................................34
System modules............................................................35
Clock modules...............................................................35
Memories and memory interfaces.................................38
Analog...........................................................................41
PWMs and timers..........................................................51
Communication interfaces.............................................52
4
Part identification.....................................................................16
4.1
4.2
4.3
4.4
Description....................................................................17
Format...........................................................................17
Fields.............................................................................17
Example........................................................................17
5
Terminology and guidelines....................................................18
5.1
5.2
5.3
5.4
5.5
5.6
Definition: Operating requirement.................................18
Definition: Operating behavior.......................................18
Definition: Attribute........................................................19
Definition: Rating...........................................................19
Result of exceeding a rating..........................................19
Relationship between ratings and operating
requirements.................................................................20
5.7
5.8
5.9
Guidelines for ratings and operating requirements.......20
Definition: Typical value................................................21
Typical value conditions................................................22
9
Design Considerations............................................................58
9.1
9.2
Thermal Design Considerations....................................58
Electrical Design Considerations...................................60
10 Obtaining package dimensions...............................................61
11 Pinout......................................................................................61
11.1 Signal Multiplexing and Pin Assignments......................61
11.2 Pinout diagrams............................................................63
12 Product Documentation...........................................................65
13 Revision History......................................................................66
6
Ratings....................................................................................22
MC56F8455x Advance Information Data Sheet, Rev. 2, 06/2012.
Freescale Semiconductor, Inc.
Preliminary
General Business Information
3
Overview
1 Overview
1.1 MC56F844x/5x/7x Product Family
The following table highlights major features, including features that differ among
members of the family. Features not listed are shared by all members of the family.
Table 1. 56F844x/5x/7x Family
Part
Number
Core
frequency
(MHz)
Flash
memory
(KB)
FlevNVM/
FlexRAM
(KB)
Total flash
memory,
including
FlexNVM
(KB)
1
RAM (KB)
Memory
resource
protection
External
Watchdog
MC56F84
789
100
786
100
769
100
766
100
763
100
553
80
550
80
543
80
540
80
587
80
585
80
567
80
565
80
462
60
452
60
451
60
442
60
441
60
256
256
128
128
128
96
96
64
64
256
256
128
128
128
96
96
64
64
32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2 32/2
288
288
160
160
160
128
128
96
96
288
288
160
160
160
128
128
96
96
32
Yes
32
Yes
24
Yes
24
Yes
24
Yes
16
Yes
16
Yes
8
Yes
8
Yes
32
Yes
32
Yes
24
Yes
24
Yes
24
Yes
16
Yes
16
Yes
8
Yes
8
Yes
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
12-bit
2x8 2x8 2x8 2x8 2x8 2x8 2x5 2x8 2x5 2x8 2x8 2x8 2x8 2x8 2x8 2x5 2x8 2x5
Cyclic ADC (300 (300 (300 (300 (300 (300 (300 (300 (300 (600 (600 (600 (600 (600 (600 (600 (600 (600
channels
ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns) ns)
16-bit SAR
ADC (with
Temp
Sensor)
channels
PWMA
with input
capture:
High-
resolution
channels
1x8
1x8
1x8
1x8
1x8
1x8
1x6
1x8
1x6
0
0
0
0
0
0
0
0
0
1x
16
1x
10
1x
16
1x
10
1x8
1x8
0
1x8
0
1x
16
1x
10
1x
16
1x
10
0
1x8
0
1x8
0
Table continues on the next page...
MC56F8455x Advance Information Data Sheet, Rev. 2, 06/2012.
4
Preliminary
General Business Information
Freescale Semiconductor, Inc.
Overview
Table 1. 56F844x/5x/7x Family (continued)
Part
Number
Standard
channels
PWMB
with input
capture:
Standard
channels
DAC
Quad
Decoder
DMA
CMP
QSCI
QSPI
I2C/SMBus
FlexCAN
LQFP
package
pin count
MC56F84
789
4
786
1
769
4
766
1
763
1
553
1
550
0
543
1
540
0
587
2x
12
0
585
1x
12,
1x9
0
567
2x
12
0
565
1x
12,
1x9
0
462
1x9
452
1x9
451
1x6
442
1x9
441
1x6
1x
12
1x7
1x
12
1x7
0
0
0
0
0
0
0
0
0
0
1
1
Yes
4
3
3
2
1
100
1
1
Yes
4
3
2
2
1
80
1
1
Yes
4
3
3
2
1
100
1
1
Yes
4
3
2
2
1
80
1
0
Yes
4
2
2
2
1
64
1
0
Yes
4
2
2
2
1
64
1
0
Yes
3
2
2
2
1
48
1
0
Yes
4
2
2
2
1
64
1
0
Yes
3
2
2
2
1
48
1
1
Yes
4
3
3
2
1
100
1
1
Yes
4
3
2
2
1
80
0
1
Yes
4
3
3
2
1
100
0
1
Yes
4
3
2
2
1
80
1
1
Yes
4
2
2
2
1
64
0
1
Yes
4
2
2
2
1
64
0
1
Yes
3
2
2
2
1
48
0
1
Yes
4
2
2
2
0
64
0
1
Yes
3
2
2
2
0
48
1. This total assumes no FlexNVM is used with FlexRAM for EEPROM.
1.2 56800EX 32-bit Digital Signal Controller Core
• Efficient 32-bit 56800EX Digital Signal Processor (DSP) engine with modified dual
Harvard architecture
• Three internal address buses
• Four internal data buses: two 32-bit primary buses, one 16-bit secondary data
bus, and one 16-bit instruction bus
• 32-bit data accesses
• Support for concurrent instruction fetches in the same cycle and dual data
accesses in the same cycle
• 20 addressing modes
• As many as 80 million instructions per second (MIPS) at 80 MHz core frequency
• 162 basic instructions
• Instruction set supports both fractional arithmetic and integer arithmetic
• 32-bit internal primary data buses supporting 8-bit, 16-bit, and 32-bit data movement,
addition, subtraction, and logical operation
• Single-cycle 16 × 16-bit -> 32-bit and 32 x 32-bit -> 64-bit multiplier-accumulator
(MAC) with dual parallel moves
MC56F8455x Advance Information Data Sheet, Rev. 2, 06/2012.
Freescale Semiconductor, Inc.
Preliminary
General Business Information
5
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