a
FEATURES
Complete 12-Bit A/D Converter with Reference
and Clock
Fast Conversion: 3 s Max
Buried Zener Reference for Long-Term Stability and
Low Gain TC: 30 ppm/ C Max (AD578)
40 ppm/ C Max (AD579)
Max Nonlinearity: < 0.012%
No Missing Codes over Temperature
Low Power: 555 mW (AD578); 775 mW (AD579)
Available to MIL-STD-883
Positive-True Parallel or Serial Logic Outputs
Short Cycle Capability
Precision +10 V Reference for External Applications
Adjustable Internal Clock
“Z”
Models for 12 V Supplies
Very Fast, Complete
10- or 12-Bit A/D Converters
AD578/AD579
FUNCTIONAL BLOCK DIAGRAM
AD578/AD579
32 –15V
31 +15V
100
20k
20k
5k
30 ANALOG GND
29 ZERO ADJ
28 20V SPAN INPUT
27 10V SPAN INPUT
10k
26 BIPOLAR OFFSET
25 GAIN (REF IN)
24 REF OUT
23 SERIAL OUT
22
SERIAL OUT
21 CONVERT START
20 EOC
SAR
CLOCK
COMPARATOR
19 CLOCK IN
18 CLOCK OUT
17 CLOCK ADJ
(AD578)
BIT 12 1
(AD578) 2
BIT 11
BIT 10 3
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
4
5
6
7
8
9
BIT 3 10
BIT 2 11
BIT 1 12
BIT 1
SHORT
CYCLE
DIGITAL
GND
+5V
13
14
15
16
GENERAL DESCRIPTION
PRODUCT HIGHLIGHTS
The AD578 and AD579 are high speed 12-bit and 10-bit succes-
sive approximation analog-to-digital converters that include an
internal clock, reference, and comparator. Their hybrid design
utilizes MSI digital and linear ICs in conjunction with a 12-bit
or 10-bit monolithic, monotonic DAC to provide superior
performance and versatility with IC size, price, and reliability.
Important performance characteristics of the AD578 include
±
1/2 LSB
12
linearity error maximum at +25∞C, maximum gain
tempco of
±
30 ppm/∞C, and maximum conversion time of 3
ms
at a typical power dissipation of 555 mW. The 10-bit AD579
provides
±1/2
LSB
10
maximum linearity error at 1.8
ms
maximum,
and 775 mW typical P
D
.
Both the AD578 and AD579 include scaling resistors that provide
analog input signal ranges of
±
5 V,
±
10 V, and 0 V to +10 V.
Both are contained in 32-lead ceramic side-brazed DIP pack-
ages, and are available with MIL-STD-883 Class B processing.
The serial output function is no longer supported on this
product after date code 9623.
1. Both the AD578 and AD579 are complete analog-to-digital
converters. No external components are required to perform
a conversion.
2. The fast conversion rates—3
ms
for the AD578, and 1.8
ms
for the AD579—make them ideal candidates for high speed
data acquisition systems requiring high throughput.
3. The internal buried Zener reference is laser trimmed to high
initial accuracy and low TC and is available externally.
4. Precision thin-film scaling resistors on the DAC provide for
excellent thermal tracking.
5. Short cycle and external clock capabilities are provided for
applications requiring faster conversion speeds and/or lower
resolution.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© 2003 Analog Devices, Inc. All rights reserved.
D/A CONVERTER
5k
AD578/AD579–SPECIFICATIONS
(Typical @ 25 C,
Parameter
RESOLUTION
ANALOG INPUTS
Voltage Ranges
Bipolar
Unipolar
Input Impedance
0 V to +10 V,
±
5 V
±
10 V, 0 V to +20 V
DIGITAL INPUTS
Convert Command
1
Clock Input
TRANSFER CHARACTERISTICS
Gain Error
2, 3
Unipolar Offset
3
Bipolar Error
3, 4
Linearity Error, 25∞C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum resolution for which no
missing codes are guaranteed)
25∞C
T
MIN
to T
MAX
POWER SUPPLY SENSITIVITY
+15 V
±
10%
–15 V
±
10%
+5 V
±
10%
TEMPERATURE COEFFICIENTS
Gain
Unipolar Offset
Bipolar Offset
Differential Linearity
CONVERSION TIME
5, 6, 7
(max)
PARALLEL OUTPUTS
Unipolar Code
Bipolar Code
Output Drive
SERIAL OUTPUTS (NRZ FORMAT)
Unipolar Code
Bipolar Code
Output Drive
END OF CONVERSION (EOC)
Output Drive
INTERNAL CLOCK
7
Output Drive
INTERNAL REFERENCE
Voltage
Drift
External Current
POWER SUPPLY REQUIREMENTS
8
Range for Rated Accuracy
Supply Current
+15 V
–15 V
+5 V
Power Dissipation
TEMPERATURE RANGE
Operating
Storage
See page 3 for notes.
15 V and +5 V, unless otherwise noted.)
AD578L
12 Bits
AD578J
12 Bits
AD578K
12 Bits
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW
10 kW
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW
10 kW
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW
10 kW
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB
12 Bits
12 Bits
0.005%/%DV
S
max
0.005%/%DV
S
max
0.005%/%DV
S
max
±
15 ppm/∞C typ
±
30 ppm/∞C max
±
3 ppm/∞C typ
±
10 ppm/∞C max
±
8 ppm/∞C typ
±
20 ppm/∞C max
±
2 ppm/∞C typ
6.0
ms
Binary
Offset Binary/Twos Complement
2 LSTTL Loads
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic l During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV
±
12 ppm/∞C,
±
20 ppm/∞C max
±
1 mA max
4.75 to 5.25 and
±
13.5 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
30 mA typ, 40 mA max
555 mW typ
0∞C to +70∞C
–65∞C to +150∞C
12 Bits
12 Bits
0.005%/%DV
S
max
0.005%/%DV
S
max
0.005%/%DV
S
max
±
15 ppm/∞C typ
±
30 ppm/∞C max
±
3 ppm/∞C typ
±
10 ppm/∞C max
±
8 ppm/∞C typ
±
20 ppm/∞C max
±
2 ppm/∞C typ
4.5
ms
12 Bits
12 Bits
0.005%/%DV
S
max
0.005%/%DV
S
max
0.005%/%DV
S
max
±
15 ppm/∞C typ
±
30 ppm/∞C max
±
3 ppm/∞C typ
±
10 ppm/∞C max
±
8 ppm/∞C typ
±
20 ppm/∞C max
±
2 ppm/∞C typ
3
ms
Binary
Binary
Offset Binary/Twos Complement Offset Binary/Twos Complement
2 LSTTL Loads
2 LSTTL Loads
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic l During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV
±
12 ppm/∞C,
±
20 ppm/∞C max
±
1 mA max
4.75 to 5.25 and
±
13.5 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
30 mA typ, 40 mA max
555 mW typ
0∞C to +70∞C
–65∞C to +150∞C
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic l During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV
±
12 ppm/∞C,
±
20 ppm/∞C max
±
1 mA max
4.75 to 5.25 and
±
13.5 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
30 mA typ, 40 mA max
555 mW typ
0∞C to +70∞C
–65∞C to +150∞C
–2–
REV. B
AD578/AD579
Parameter
RESOLUTION
ANALOG INPUTS
Voltage Ranges
Bipolar
Unipolar
Input Impedance
0 V to +10 V,
±
5 V
±
10 V, 0 V to +20 V
DIGITAL INPUTS
Convert Command
1
Clock Input
TRANSFER CHARACTERISTICS
Gain Error
2, 3
Unipolar Offset
3
Bipolar Error
3, 4
Linearity Error, 25∞C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum resolution for which no
missing codes are guaranteed)
25∞C
T
MIN
to T
MAX
POWER SUPPLY SENSITIVITY
+15 V
±
10%
–15 V
±
10%
+5 V
±
10%
TEMPERATURE COEFFICIENTS
Gain
Unipolar Offset
Bipolar Offset
Differential Linearity
CONVERSION TIME
5, 6, 7
(max)
PARALLEL OUTPUTS
Unipolar Code
Bipolar Code
Output Drive
SERIAL OUTPUTS (NRZ FORMAT)
Unipolar Code
Bipolar Code
Output Drive
END OF CONVERSION (EOC)
Output Drive
INTERNAL CLOCK
7
Output Drive
INTERNAL REFERENCE
Voltage
Drift
External Current
POWER SUPPLY REQUIREMENTS
8
Range for Rated Accuracy
Supply Current +15 V
–15 V
+5 V
Power Dissipation
TEMPERATURE RANGE
Operating
Storage
AD578SD
9
12 Bits
AD578TD
9
12 Bits
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW
10 kW
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB max
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW
10 kW
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB max
12 Bits
12 Bits
12 Bits
12 Bits
0.005%/%DV
S
max
0.005%/%DV
S
max
0.005%/%DV
S
max
±
15 ppm/∞C typ
±
30 ppm/∞C max
±
3 ppm/∞C typ
±
10 ppm/∞C max
±
8 ppm/∞C typ
±
20 ppm/∞C max
±
2 ppm/∞C typ
4.5
ms
Binary
Offset Binary/Twos Complement
2 LSTTL Loads
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic l During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV
±
12 ppm/∞C,
±
20 ppm/∞C max
4.75 to 5.25 and
±
13.5 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
30 mA typ, 40 mA max
0.005%/%DV
S
max
0.005%/%DV
S
max
0.005%/%DV
S
max
±
15 ppm/∞C typ
±
50 ppm/∞C max
±
3 ppm/∞C typ
±
15 ppm/∞C max
±
8 ppm/∞C typ
+± 25 ppm/∞C max
±
2 ppm/∞C typ
6.0
ms
Binary
Offset Binary/Twos Complement
2 LSTTL Loads
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic l During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV
±
12 ppm/∞C,
±
20 ppm/∞C max
±
1 mA max
±
1 mA max
4.75 to 5.25 and
±
13.5 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
30 mA typ, 40 mA max
555 mW typ 555 mW typ
–55∞C to +125∞C
–65∞C to +150∞C
–55∞C to +125∞C
–65∞C to +150∞C
NOTES
1
Positive pulse 200 ns wide (min) leading edge (0 to 1) resets outputs. Trailing edge initiates conversion.
2
With 50
W,
1% fixed resistor in place of gain adjust potentiometer.
3
Adjustable to 0.
4
With 50
W,
1% resistor between Ref Out and Bipolar Offset (Pins 24 and 26).
5
Conversion time is defined as the time between the falling edge of convert start and the falling edge of the EOC.
6
Each grade is specified at the conversion speed shown.
7
Externally adjustable by a resistor or capacitor (see Figure 6).
8
For “Z” models, order AD578ZJ, AD578ZK, or AD578ZL (± 11.6 V to
±
16.5 V).
9
Available to MIL-STD-883, Level B. See ADI Military Products Databook for detailed specifications.
S
pecifications subject to change without notice.
REV. B
–3–
AD578/AD579
Parameter
RESOLUTION
ANALOG INPUTS
Voltage Ranges
Bipolar
Unipolar
Input Impedance
0 V to +10 V,
±
5 V
±
10 V, 0 V to +20 V
DIGITAL INPUTS
Convert Command
1
Clock Input
TRANSFER CHARACTERISTICS
Gain Error
2, 3
Unipolar Offset
3
Bipolar Error
3, 4
Linearity Error, 25∞C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum resolution for which no
missing codes are guaranteed)
25∞C
T
MIN
to T
MAX
POWER SUPPLY SENSITIVITY
+15 V
±
10%
–15 V
±
10%
+5 V
±
10%
“Z” Versions
+12 V
±
5%
–12 V
±
5%
TEMPERATURE COEFFICIENTS
Gain
Unipolar Offset
Bipolar Offset
Differential Linearity
CONVERSION TIME
5, 6
(max)
T
MIN
to T
MAX
PARALLEL OUTPUTS
Unipolar Code
Bipolar Code
Output Drive
SERIAL OUTPUTS (NRZ FORMAT)
Unipolar Code
Bipolar Code
Output Drive
END OF CONVERSION (EOC)
Output Drive
INTERNAL CLOCK
7
Output Drive
INTERNAL REFERENCE
Voltage
Temperature Coefficient
External Current
POWER SUPPLY REQUIREMENTS
Range for Rated Accuracy
Z Models
8
Supply Current
+15 V
–15 V
+5 V
Power Dissipation
TEMPERATURE RANGE
Operating
Storage
AD579JN
10 Bits
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW (± 20%)
10 kW (± 20%)
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB
AD579KN
10 Bits
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW (± 20%)
10 kW (± 20%)
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB
10 Bits
10 Bits
0.005%/%DV
S
max
0.005%/%DV
S
max
0.001%/%DV
S
max
0.007%/%DV
S
max
0.007%/%DV
S
max
±
25 ppm/∞C typ
±
40 ppm/∞C max
±
5 ppm/∞C typ
±
15 ppm/∞C max
±
8 ppm/∞C typ
±
20 ppm/∞C max
±
2 ppm/∞C typ
2.2
ms
2.4
ms
Binary
Offset Binary/Twos Complement
2 LSTTL Loads
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic 1 During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV typ
±
15 ppm/∞C
±
1 mA max
4.75 to 5.25 and
±
13.5 to
±
16.5
4.75 to 5.25 and
±
11.4 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
100 mA typ, 150 mA max
775 mW typ
0∞C to +70∞C
–65∞C to +150∞C
10 Bits
10 Bits
0.005%/%DV
S
max
0.005%/%DV
S
max
0.001%/%DV
S
max
0.007%/%DV
S
max
0.007%/%DV
S
max
±
25 ppm/∞C typ
±
40 ppm/∞C max
±
5 ppm/∞C typ
±
15 ppm/∞C max
±
8 ppm/∞C typ
±
20 ppm/∞C max
±
2 ppm/∞C typ
1.8
ms
2.0
ms
Binary
Offset Binary/Twos Complement
2 LSTTL Loads
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic 1 During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV typ
±
15 ppm/∞C
±
1 mA max
4.75 to 5.25 and
±
13.5 to
±
16.5
4.75 to 5.25 and
±
11.4 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
100 mA typ, 150 mA max
775 mW typ
0∞C to +70∞C
–65∞C to +150∞C
NOTES
1
Positive pulse 200 ns wide (min) leading edge (0 to 1) resets outputs. Trailing edge initiates conversion.
2
With 50
W,
1% fixed resistor in place of gain adjust potentiometer.
3
Adjustable to zero.
4
With 50
W,
1% resistor between Ref Out and Bipolar Offset (Pins 24 and 26).
5
Conversion time is defined as the time between the falling edge of convert start and the falling edge of the EOC.
(Continued on page 5)
–4–
REV. B
AD578/AD579
Parameter
RESOLUTION
ANALOG INPUTS
Voltage Ranges
Bipolar
Unipolar
Input Impedance
0 V to +10 V,
±
5 V
±
10 V, 0 V to +20 V
DIGITAL INPUTS
Convert Command
1
Clock Input
TRANSFER CHARACTERISTICS
Gain Error
2, 3
Unipolar Offset
3
Bipolar Error
3, 4
Linearity Error, 25∞C
T
MIN
to T
MAX
DIFFERENTIAL LINEARITY ERROR
(Minimum resolution for which no
missing codes are guaranteed)
25∞C
T
MIN
to T
MAX
POWER SUPPLY SENSITIVITY
+15 V
±
10%
–15 V
±
10%
+5 V
±
10%
“Z” Versions
+12 V
±
5%
–12 V
±
5%
TEMPERATURE COEFFICIENTS
Gain
Unipolar Offset
Bipolar Offset
Differential Linearity
CONVERSION TIME
5, 6
(max)
T
MIN
to T
MAX
PARALLEL OUTPUTS
Unipolar Code
Bipolar Code
Output Drive
SERIAL OUTPUTS (NRZ FORMAT)
Unipolar Code
Bipolar Code
Output Drive
END OF CONVERSION (EOC)
Output Drive
INTERNAL CLOCK
7
Output Drive
INTERNAL REFERENCE
Voltage
Temperature Coefficient
External Current
POWER SUPPLY REQUIREMENTS
Range for Rated Accuracy
Z Models
8
Supply Current
+15 V
–15 V
+5 V
Power Dissipation
TEMPERATURE RANGE
Operating
Storage
AD579TD
9
10 Bits
±
5.0 V,
±
10 V
0 V to +10 V, 0 V to +20 V
5 kW (± 20%)
10 kW (± 20%)
1 LSTTL Load
1 LSTTL Load
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
0.1% FSR,
±
0.25% FSR max
±
1/2 LSB max
±
3/4 LSB
10 Bits
10 Bits
0.005%/%DV
S
max
0.005%/%DV
S
max
0.001%/%DV
S
max
0.007%/%DV
S
max
0.007%/%DV
S
max
±
25 ppm/∞C typ
±
40 ppm/∞C max
±
5 ppm/∞C typ
±
15 ppm/∞C max
±
8 ppm/∞C typ
±
20 ppm/∞C max
±
2 ppm/∞C typ
1.8
ms
2.0
ms
Binary
Offset Binary/Twos Complement
2 LSTTL Loads
Binary/Complementary Binary
Offset Binary/Comp. Offset Binary
2 LSTTL Loads
Logic 1 During Conversion
8 LSTTL Loads
2 LSTTL Loads
10.000
±
100 mV typ
±
15 ppm/∞C
±
1 mA max
4.75 to 5.25 and
±
13.5 to
±
16.5
4.75 to 5.25 and
±
11.4 to
±
16.5
5 mA typ, 8 mA max
22 mA typ, 35 mA max
100 mA typ, 150 mA max
775 mW typ
–55∞C to +125∞C
–65∞C to +150∞C
NOTES (continued)
6
Each grade is specified at the conversion speed shown.
7
Externally adjustable by a resistor or capacitor. See Figure 8 for appropriate connections.
8
For “Z” models, order AD579ZJN, AD579ZKN, or AD579ZTD.
9
Available to MIL-STD-883, Level B. See ADI Military Products Databook for detailed specifications.
Specifications subject to change without notice.
REV. B
–5–
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