CXA2050S
Y/C/RGB/D for PAL/NTSC Color TVs
Description
The CXA2050S is a bipolar IC which integrates the
luminance signal processing, chroma signal
processing, RGB signal processing, and sync and
deflection signal processing functions for PAL/NTSC
system color TVs onto a single chip. This IC includes
deflection processing functions for wide-screen TVs,
and is also equipped with a SECAM decoder
interface, making it possible to construct a TV
system that supports multiple color systems.
64 pin SDIP (Plastic)
Features
•
I
2
C bus compatible
•
Compatible with both PAL and NTSC systems
(also compatible with SECAM if a SECAM decoder is connected)
•
Built-in deflection compensation circuit capable of supporting various wide modes
•
Countdown system eliminates need for H and V oscillator frequency adjustment
•
Automatic identification of 50/60Hz vertical frequency (forced control possible)
•
Non-interlace display support (even/odd selectable)
•
Automatic identification of PAL, NTSC, and SECAM color systems (forced control possible)
•
Automatic identification of 4.43MHz/3.58MHz crystal (forced control possible)
•
Non-adjusting Y/C block filter
•
One CV input, one set of Y/C inputs, two sets of analog RGB inputs (one set of which can serve as both
analog and digital inputs)
•
Built-in AKB circuit
•
Support for forcing YS1 off
Applications
Color TVs (4:3, 16:9)
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings
(Ta = 25°C, SGND, DGND = 0V)
•
Supply voltage
SV
CC
1, 2, DV
CC
1, 2
–0.3 to +12
V
•
Operating temperature
Topr
–20 to +65
°C
•
Storage temperature
Tstg
–65 to +150
°C
•
Allowable power consumption P
D
1.7
W
•
Voltages at each pin
–0.3 to SV
CC
1, SV
CC
2,
DV
CC
1, DV
CC
2 + 0.3 V
Operating Conditions
Supply voltage
SV
CC
1, 2
DV
CC
1, 2
9.0 ± 0.5
9.0 ± 0.5
V
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E96403-PS
CXA2050S
Pin Description
Pin
No.
1
SV
CC
1
Symbol
Equivalent circuit
Description
Power supply for Y/C block.
4.6V
2
APCFIL
2
1.2k
1.2k
CR connection for the chroma APC lag-
lead filter.
4k
3
X443
3
500
200µA
Connect a 4.433619MHz crystal oscillator.
4k
4
X358
4
500
200µA
Connect a 3.579545MHz crystal oscillator.
1k
5
TEST
5
15k
Test pin.
Outputs a 0 to 3V V-SYNC SEP with
positive polarity. If not used, leave this
pin open.
1.2k
6
FSCOUT
6
147
280µA
Subcarrier output.
Output level: 5.2VDC, 0.4Vp-p
–4–
CXA2050S
Pin
No.
Symbol
Equivalent circuit
Description
6k
20p
7
SECAMREF
7
250µA
7.2V
SECAM decoder interface. This pin
serves as both a 4.43MHz output and as
a SECAM identification input/output pin.
8
SGND1
—
GND for Y/C block.
200µA
9
10
– (R-Y) OUT
– (B-Y) OUT
9
10
Color difference signal outputs. Go to
high impedance when the SECAM
system is detected.
Standard output levels for 75% CB:
B-Y: 0.665Vp-p
R-Y: 0.525Vp-p
5.7VDC when killer is ON.
500
11
YOUT
11
30k
400µA
Luminance signal output.
Black level is 3.5VDC.
Standard output level for 100 IRE input:
1Vp-p
1k
12
SCPOUT
12
10k
1k
Sand castle pulse output. The 0 to 5V
BGP pulse, the phase of which is
controlled through the bus, is
superimposed with the 0 to 2V H and
VBLK pulse for output.
13
YRET
13
1.5k
70k
Luminance signal input.
Clamped to 4.8V at the burst timing.
Standard input level for 100 IRE input:
1Vp-p
–5–
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