CMX865A
Telecom Signalling
Device
D/865A/5 May 2012
CMX865A – DTMF CODEC AND TELECOM SIGNALLING COMBO
Features
V.23 1200/75, 1200/1200, 75, 1200 bps FSK
Bell 202 1200/150, 1200/1200, 150, 1200 bps FSK
V.21 or Bell 103 300/300 bps FSK
Low Voice Falsing DTMF Decoder
DTMF/Tones Transmit and Receive
Low Power - High Performance
Applications
Wireless Local Loops
SMS Phones
Security Systems
Remote Utility Meter Reading
Industrial Control Systems
Pay-Phones
Set-Top Boxes
CMX865A
TX USART
FSK MODULATOR
TONE / DTMF GENERATOR
RX USART
FSK RECEIVER
TONE / DTMF DETECTOR
LINE
LINE
INTERFACE
C-BUS
SERIAL
INTERFACE
HOST
µC
1.
Brief Description
The CMX865A is a multi-standard modem for use in Wireless Local Loop, Short Message Service
telephone based information and telemetry systems. Flexible line driver, hybrid and receiver circuits are
integrated on chip, requiring only passive external components to build a 2 or 4-wire line interface.
A high-quality DTMF decoder with excellent immunity to falsing on voice and a standard DTMF encoder
are included. Alternatively, these blocks can be used to transmit and detect user-specific, programmed
single and dual-tone signals, simple melodies, call progress signals or modem calling and answering
tones.
Host control and data transfer is via a high-speed serial bus that operates in normal and Powersave
modes and which is compatible with most simple types of µC serial interface. An embedded USART
allows multi-format asynchronous data and unformatted synchronous data to be received or transmitted
as 8-bit bytes.
The CMX865A operates from a single 3.0V to 3.6V supply over a temperature range of -40°C to +85°C
and is available in 16-pin SOIC (D4) and 16-pin TSSOP (E4) packages.
2012 CML Microsystems Plc
Telecom Signalling Device
CMX865A
CONTENTS
Section
1.
2.
3.
4.
Page
Brief Description ..................................................................................... 1
Block Diagram ......................................................................................... 3
Signal List ................................................................................................ 4
External Components ............................................................................. 5
4.1.
Line Interface (DAA) .................................................................... 6
4.1.1. 2-Wire Line Interface ....................................................... 6
4.1.2. 4-Wire Line Interface ....................................................... 7
4.1.3. Wireless Local Loop Interface......................................... 8
General Description ................................................................................ 9
5.1.
TXA/TXAN Differential Output ................................................... 10
5.2.
Tx USART .................................................................................. 10
5.3.
FSK Modulator ........................................................................... 11
5.4.
Tx Filter and Equaliser ............................................................... 11
5.5.
DTMF/Tone Generator ............................................................... 11
5.6.
Tx Level Control and Output Buffer ........................................... 11
5.7.
Rx DTMF/Tones Detectors ........................................................ 12
5.8.
Rx Modem Filtering and Demodulation ..................................... 12
5.9.
Rx Modem Pattern Detectors..................................................... 14
5.10. Rx Data Register and USART ................................................... 14
5.11. C-BUS Interface ......................................................................... 15
5.11.1. General Reset Command ............................................. 17
5.11.2. General Control Register .............................................. 17
5.11.3. Transmit Mode Register ................................................ 19
5.11.4. Receive Mode Register ................................................. 22
5.11.5. Tx Data Register ........................................................... 23
5.11.6. Rx Data Register ........................................................... 24
5.11.7. Status Register ............................................................. 24
5.11.8. Programming Register .................................................. 28
Application Notes .................................................................................. 31
6.1.
Simple voice record and playback on the CMX865A................. 31
6.2.
Mixing external signals such as voice onto the transmit path .... 34
6.3.
Receiving on-hook Caller-ID ...................................................... 34
Performance Specification ................................................................... 36
7.1.
Electrical Performance ............................................................... 36
7.1.1. Absolute Maximum Ratings .......................................... 36
7.1.2. Operating Limits ............................................................ 36
7.1.3. Operating Characteristics ............................................. 37
7.2.
Packaging .................................................................................. 44
Page
TXA/TXAN state with selected operating mode..................................... 10
Status Register....................................................................................... 25
Received DTMF Code: Status Register b3-0 ........................................ 27
Programming Register: Filter Coefficients ............................................. 30
5.
6.
7.
Table
Table 1
Table 2
Table 3
Table 4
It is always recommended that you check for the latest product datasheet version from the
Datasheets page of the CML website: [www.cmlmicro.com].
2012 CML Microsystems Plc
2
D/865A/5
2.
Telecom Signalling Device
2012 CML Microsystems Plc
Tx Output
Buffer
TXA
TXAN
Tx Level
Control
LOCAL
ANALOGUE
LOOPBACK
FSK
DEMODULATOR
MODEM
ENERGY
DETECTOR
RECEIVE
MODEM
FILTER &
EQUALISER
Rx Gain
Control
V
BIAS
+
-
RXAN
Rx Input
Amplifier
RXAFB
Block Diagram
IRQN
DTMF/TONE
GENERATOR
FSK
MODULATOR
TRANSMIT
FILTER &
EQUALISER
SERIAL
CLOCK
COMMAND
DATA
CSN
REPLY
DATA
Figure 1 Block Diagram
3
Xtal Osc and
Clock Dividers
XTAL / CLOCK
XTALN
V
BIAS
V
DD
DTMF/TONE/
CALL PROG/
ANSWER TONE
DETECTOR
V
DEC
V
SSD
V
SSA
CMX865A
D/865A/5
Telecom Signalling Device
CMX865A
3.
Signal List
CMX865A
(D4 and E4)
Pin No.
1
Signal
Name
V
DEC
Type
Power
Internally generated 2.5V supply voltage. Must
be decoupled to V
SSD
by capacitors mounted
close to the device pins. No other connections
allowed.
The output of the on-chip Xtal oscillator inverter.
The input to the oscillator inverter from the Xtal
circuit or external clock source.
A ‘wire-ORable’ output for connection to a
C
Interrupt Request input. This output is pulled
down to V
SS
when active and is high impedance
when inactive. An external pull-up resistor is
required i.e. R1 of Figure 2.
The digital negative supply rail (ground).
The analogue negative supply rail (ground).
The inverting input to the Rx Input Amplifier
The output of the Rx Input Amplifier.
Internally
generated
bias
voltage
of
approximately V
DD
/2, except when the device is
in ‘Powersave’ mode when V
BIAS
will discharge
to V
SS
. Should be decoupled to V
SS
by a
capacitor mounted close to the device pins.
The inverted output of the Tx Output Buffer.
The non-inverted output of the Tx Output Buffer.
The positive supply rail. Levels and thresholds
within the device are proportional to this voltage.
The C-BUS chip select input from the
C.
The C-BUS serial data input from the
C.
The C-BUS serial clock input from the
C.
A 3-state C-BUS serial data output to the
C.
This output is high impedance when not sending
data to the
C.
Description
2
3
4
XTALN
XTAL/CLOCK
IRQN
O/P
I/P
O/P
5
6
7
8
9
V
SSD
V
SSA
RXAN
RXAFB
V
BIAS
Power
Power
I/P
O/P
O/P
10
11
12
13
14
15
16
TXAN
TXA
V
DD
CSN
COMMAND
DATA
SERIAL
CLOCK
REPLY DATA
O/P
O/P
Power
I/P
I/P
I/P
T/S
Notes:
I/P
O/P
BI
T/S
NC
=
=
=
=
=
Input
Output
Bidirectional
3-state Output
No Connection
2012 CML Microsystems Plc
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D/865A/5
Telecom Signalling Device
CMX865A
4.
V
DD
External Components
C1
V
DEC
1
16
XTALN
2
15
X1 XTAL
3
14
CMX865A
IRQN 4
13
V
SSD
V
SSA
Rx Line
Interface
RXAN
RXFB
5
6
7
8
12
11 TXA
TXAN
10
9 V
BIAS
REPLY DATA
SERIAL CLOCK
COMMAND DATA
CSN
V
DD
Tx Line
Interface
C3
V
SSA
+
V
DEC
C7
V
SSD
R1
X1
R1
V
SSD
C2
C-BUS
to/from
µC
C6
+
C5
V
DD
C4
V
SSA
Ground plane
connection
V
SSA
V
SSD
C1, C2
C3, C4, C7
C5, C6
22pF
100nF
10uF
V
SSD
V
SSA
68k
6.144MHz (+ 300ppm)
Resistors ±5%, capacitors ±20% unless otherwise stated
Figure 2 Recommended External Components for a Typical Application
This device is capable of detecting and decoding small amplitude signals. To achieve this, V
DD,
V
DEC
and
V
BIAS
should be decoupled close to the package and the receive path protected from extraneous in-band
signals.
It is recommended that the printed circuit board is laid out with low impedance analogue and digital
ground planes. The analogue ground plane should be a solid area under the analogue section of the
device defined by pins 6 – 11, plus associated external components. The digital ground plane should be
a solid area under the digital section of the device defined by pins 1 – 5 and 13 –16, plus associated
external components. The two ground planes should be connected together at a suitable point and
connected into the board ground.
The V
SS
connections to the Xtal oscillator capacitors C1 and C2 should also be low impedance and
preferably be part of the digital V
SS
ground plane to ensure reliable start up of the oscillator.
For best results, an Xtal oscillator design should drive the clock inverter input with signal levels of at least
40% of V
DD
peak-to-peak. To obtain Xtal oscillator design assistance, please consult your Xtal
manufacturer.
2012 CML Microsystems Plc
5
D/865A/5
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