MUN5312DW1,
NSBC124EPDXV6,
NSBC124EPDP6
Complementary Bias
Resistor Transistors
R1 = 22 kW, R2 = 22 kW
NPN and PNP Transistors with Monolithic
Bias Resistor Network
This series of digital transistors is designed to replace a single
device and its external resistor bias network. The Bias Resistor
Transistor (BRT) contains a single transistor with a monolithic bias
network consisting of two resistors; a series base resistor and a
base-emitter resistor. The BRT eliminates these individual
components by integrating them into a single device. The use of a BRT
can reduce both system cost and board space.
Features
(3)
R
1
Q
1
Q
2
R
2
(4)
(5)
R
1
(6)
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PIN CONNECTIONS
(2)
R
2
(1)
Simplifies Circuit Design
Reduces Board Space
Reduces Component Count
S and NSV Prefix for Automotive and Other Applications
Requiring Unique Site and Control Change Requirements;
AEC-Q101 Qualified and PPAP Capable
These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS
Compliant
MAXIMUM RATINGS
(T
A
= 25C both polarities Q
1
(PNP) & Q
2
(NPN), unless otherwise noted)
Rating
Collector-Base Voltage
Collector-Emitter Voltage
Collector Current
−
Continuous
Input Forward Voltage
Input Reverse Voltage
Symbol
V
CBO
V
CEO
I
C
V
IN(fwd)
V
IN(rev)
Max
50
50
100
40
10
Unit
Vdc
Vdc
mAdc
Vdc
Vdc
MARKING DIAGRAMS
6
SOT−363
CASE 419B
1
12 M
G
G
SOT−563
CASE 463A
1
12 M
G
G
SOT−963
CASE 527AD
1
M
G
G
R
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
12/R
M
G
= Specific Device Code
= Date Code*
= Pb-Free Package
ORDERING INFORMATION
Device
MUN5312DW1T1G,
SMUN5312DW1T1G
MUN5312DW1T2G
NSBC124EPDXV6T1G
NSBC124EPDXV6T5G
NSBC124EPDP6T5G
Package
SOT−363
SOT−363
SOT−563
SOT−563
SOT−963
Shipping
†
3,000/Tape & Reel
3,000/Tape & Reel
4,000/Tape & Reel
8,000/Tape & Reel
8,000/Tape & Reel
(Note: Microdot may be in either location)
*Date Code orientation may vary depending
upon manufacturing location.
†For information on tape and reel specifications, including part orientation and
tape sizes, please refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
Semiconductor Components Industries, LLC, 2012
September, 2012
−
Rev. 0
1
Publication Order Number:
DTC124EP/D
MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
THERMAL CHARACTERISTICS
Characteristic
MUN5312DW1 (SOT−363) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
MUN5312DW1 (SOT−363) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
Thermal Resistance,
Junction to Lead
Junction and Storage Temperature Range
NSBC124EPDXV6 (SOT−563) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
NSBC124EPDXV6 (SOT−563) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
Junction and Storage Temperature Range
NSBC124EPDP6 (SOT−963) ONE JUNCTION HEATED
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
NSBC124EPDP6 (SOT−963) BOTH JUNCTION HEATED
(Note 3)
Total Device Dissipation
T
A
= 25C
Derate above 25C
Thermal Resistance,
Junction to Ambient
Junction and Storage Temperature Range
1.
2.
3.
4.
5.
FR−4 @ Minimum Pad.
FR−4 @ 1.0
1.0 Inch Pad.
Both junction heated values assume total power is sum of two equally powered channels.
FR−4 @ 100 mm
2
, 1 oz. copper traces, still air.
FR−4 @ 500 mm
2
, 1 oz. copper traces, still air.
(Note 4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
P
D
339
408
2.7
3.3
369
306
−55
to +150
MW
mW/C
C/W
(Note 4)
(Note 5)
(Note 4)
(Note 5)
(Note 4)
(Note 5)
P
D
231
269
1.9
2.2
540
464
MW
mW/C
C/W
(Note 1)
(Note 1)
(Note 1)
P
D
500
4.0
250
−55
to +150
mW
mW/C
C/W
C
(Note 1)
(Note 1)
(Note 1)
P
D
357
2.9
350
mW
mW/C
C/W
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
250
385
2.0
3.0
493
325
188
208
−55
to +150
mW
mW/C
C/W
(Note 1)
(Note 2)
(Note 1)
(Note 2)
(Note 1)
(Note 2)
P
D
187
256
1.5
2.0
670
490
mW
mW/C
C/W
Symbol
Max
Unit
R
qJA
R
qJA
R
qJL
C/W
T
J
, T
stg
C
R
qJA
R
qJA
T
J
, T
stg
R
qJA
R
qJA
T
J
, T
stg
C
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MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
ELECTRICAL CHARACTERISTICS
(T
A
= 25C both polarities Q
1
(PNP) & Q
2
(NPN), unless otherwise noted)
Characteristic
OFF CHARACTERISTICS
Collector-Base Cutoff Current
(V
CB
= 50 V, I
E
= 0)
Collector-Emitter Cutoff Current
(V
CE
= 50 V, I
B
= 0)
Emitter-Base Cutoff Current
(V
EB
= 6.0 V, I
C
= 0)
Collector-Base Breakdown Voltage
(I
C
= 10
mA,
I
E
= 0)
Collector-Emitter Breakdown Voltage (Note 6)
(I
C
= 2.0 mA, I
B
= 0)
ON CHARACTERISTICS
DC Current Gain (Note 6)
(I
C
= 5.0 mA, V
CE
= 10 V)
Collector-Emitter Saturation Voltage (Note 6)
(I
C
= 10 mA, I
B
= 0.3 mA)
Input Voltage (Off)
(V
CE
= 5.0 V, I
C
= 100
mA)
(NPN)
(V
CE
= 5.0 V, I
C
= 100
mA)
(PNP)
Input Voltage (On)
(V
CE
= 0.2 V, I
C
= 5.0 mA) (NPN)
(V
CE
= 0.2 V, I
C
= 5.0 mA) (PNP)
Output Voltage (On)
(V
CC
= 5.0 V, V
B
= 2.5 V, R
L
= 1.0 kW)
Output Voltage (Off)
(V
CC
= 5.0 V, V
B
= 0.5 V, R
L
= 1.0 kW)
Input Resistor
Resistor Ratio
6. Pulsed Condition: Pulse Width = 300 ms, Duty Cycle
2%.
h
FE
V
CE(sat)
V
i(off)
60
−
−
−
−
−
−
4.9
15.4
0.8
100
−
1.2
1.2
1.9
2.0
−
−
22
1.0
−
0.25
−
−
−
−
0.2
−
28.6
1.2
V
Vdc
I
CBO
I
CEO
I
EBO
V
(BR)CBO
V
(BR)CEO
−
−
−
50
50
−
−
−
−
−
100
500
0.2
−
−
nAdc
nAdc
mAdc
Vdc
Vdc
Symbol
Min
Typ
Max
Unit
V
i(on)
Vdc
V
OL
V
OH
R1
R
1
/R
2
Vdc
Vdc
kW
400
P
D
, POWER DISSIPATION (mW)
350
300
250
200
150
100
50
0
−50
−25
0
25
50
75
100
125
150
(1) (2) (3)
(1) SOT−363; 1.0
1.0 Inch Pad
(2) SOT−563; Minimum Pad
(3) SOT−963; 100 mm
2
, 1 oz. Copper Trace
AMBIENT TEMPERATURE (C)
Figure 1. Derating Curve
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MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
TYPICAL CHARACTERISTICS
−
NPN TRANSISTOR
MUN5312DW1, NSBC124EPDXV6
V
CE(sat)
, COLLECTOR−EMITTER VOLTAGE (V)
1
I
C
/I
B
= 10
T
A
=
−25C
75C
h
FE
, DC CURRENT GAIN
25C
0.1
1000
25C
V
CE
= 10 V
T
A
= 75C
−25C
100
0.01
0.001
10
0
20
I
C
, COLLECTOR CURRENT (mA)
40
50
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 2. V
CE(sat)
vs. I
C
3.2
C
ob
, OUTPUT CAPACITANCE (pF)
2.8
2.4
2.0
1.6
1.2
0.8
0.4
0
0
10
20
30
40
V
R
, REVERSE VOLTAGE (V)
50
f = 10 kHz
I
E
= 0 A
T
A
= 25C
I
C
, COLLECTOR CURRENT (mA)
100
Figure 3. DC Current Gain
75C
10
1
25C
T
A
=
−25C
0.1
0.01
V
O
= 5 V
0
2
4
6
V
in
, INPUT VOLTAGE (V)
8
10
0.001
Figure 4. Output Capacitance
Figure 5. Output Current vs. Input Voltage
100
V
O
= 0.2 V
T
A
=
−25C
V
in
, INPUT VOLTAGE (V)
10
25C
1
75C
0.1
0
10
20
30
40
50
I
C
, COLLECTOR CURRENT (mA)
Figure 6. Input Voltage vs. Output Current
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MUN5312DW1, NSBC124EPDXV6, NSBC124EPDP6
TYPICAL CHARACTERISTICS
−
PNP TRANSISTOR
MUN5312DW1, NSBC124EPDXV6
V
CE(sat),
COLLECTOR−EMITTER VOLTAGE (V)
h
FE,
DC CURRENT GAIN (NORMALIZED)
10
I
C
/I
B
= 10
T
A
=
−25C
25C
1
75C
1000
V
CE
= 10 V
T
A
= 75C
100
25C
−25C
0.1
0.01
0
40
20
60
I
C
, COLLECTOR CURRENT (mA)
80
10
1
10
I
C
, COLLECTOR CURRENT (mA)
100
Figure 7. V
CE(sat)
vs. I
C
Figure 8. DC Current Gain
10
C
ob,
OUTPUT CAPACITANCE (pF)
8
7
6
5
4
3
2
1
0
0
10
20
30
40
V
R
, REVERSE VOLTAGE (V)
50
f = 10 kHz
l
E
= 0 A
T
A
= 25C
I
C,
COLLECTOR CURRENT (mA)
9
100
75C
10
25C
T
A
=
−25C
1
0.1
0.01
0
1
2
3
4
5
6
7
V
in
, INPUT VOLTAGE (V)
V
O
= 5 V
8
9
10
0.001
Figure 9. Output Capacitance
Figure 10. Output Current vs. Input Voltage
100
V
O
= 0.2 V
T
A
=
−25C
V
in,
INPUT VOLTAGE (V)
10
75C
25C
1
0.1
0
10
20
30
40
50
I
C
, COLLECTOR CURRENT (mA)
Figure 11. Input Voltage vs. Output Current
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