NCP391
Positive Overvoltage
Protection Controller with
Internal Low R
ON
NMOS FET
The NCP391 is able to disconnect the systems from its output pin
when wrong input operating conditions are detected. The system is
positive overvoltage protected up to +28 V.
This device uses an internal NMOS and therefore, no external
device is necessary, reducing the system cost and the PCB area of the
application board.
The NCP391 is able to instantaneously disconnect the output from
the input, due to integrated Low R
ON
Power NMOS, if the input
voltage exceeds the overvoltage threshold (OVLO) or falls below the
undervoltage threshold (UVLO).
At powerup (EN pin = low level), the V
out
turns on t
on
time after
the V
in
exceeds the undervoltage threshold.
The NCP391 provides a negative going flag (FLAG) output, which
alerts the system that a fault has occurred.
In addition, the device has ESD−protected input (15 kV Air) when
bypassed with a 1.0
mF
or larger capacitor.
Features
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MARKING
DIAGRAM
WLCSP6
FCAL SUFFIX
CASE 499BP
391LG
AYWW
WLCSP6
FCCAD SUFFIX
CASE 567JW
XXXX
A
Y
WW
G
391DG
AYWW
•
•
•
•
•
•
•
•
•
Overvoltage Protection up to 28 V
On−Chip Low R
DS(on)
NMOS Transistor
Internal Charge Pump
Overvoltage Lockout (OVLO)
Undervoltage Lockout (UVLO)
Soft−Start
Alert
FLAG
Output
Shutdown
EN
Input
Compliance to IEC61000−4−2 (Level 4)
8.0 kV (Contact)
15 kV (Air)
•
ESD Ratings: Machine Model = B
Human Body Model = 2
•
WLCSP6 1.31x1.04 mm Package
•
This is a Pb−Free Device
Applications
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
PIN CONNECTIONS
IN
1
IN
2
OUT
3
EN
6
GND
5
FLAG
4
or
IN
A1
IN
A2
OUT
A3
EN
B1
GND
B2
FLAG
B3
(Top View)
(Top View)
•
•
•
•
•
ORDERING INFORMATION
See detailed ordering, marking and shipping information in the
package dimensions section on page 12 of this data sheet.
Cell Phones
Camera Phones
Digital Still Cameras
Personal Digital Applications
MP3 Players
QFN−16
©
Semiconductor Components Industries, LLC, 2014
1
May, 2014 − Rev. 2
Publication Order Number:
NCP391/D
NCP391
Wall Adapter − AC/DC − USB
NCP391
IN
OUT 3
2
4
IN
FLAG
6
5
EN
GND
1
CC/CV
Charger or
System
B+
BATTERY
10 k
V
CC
mP
1
mF
ENABLE/
Microprocessor
0
0
Figure 1. Typical Application Circuit
1
3
INPUT
Gate
Driver
2
V
REF
Charge
Pump
EN Block
UVLO
OVLO
TSD
Control
Logic and
Timer
4
EN
6
FLAG
5
GND
Figure 2. Functional Block Diagram
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2
NCP391
PIN FUNCTION DESCRIPTION
Pin No.
1, 2 or
A1, A2
Symbol
IN
Function
INPUT
Description
Input Voltage Pins. These pins are connected to the Wall Adapoter (AC−DC, Vbus ..). A 1
mF
low
ESR ceramic capacitor, or larger, must be connected between these pins and GND, as close as
possible to the DUT. The two IN pins must be connected together to power supply. (See PCB recom-
mendation for the pin7).
Output Voltage Pins. This pin follows IN pins when “no fault” is detected.
Fault Indication Pin. This pin allows an external system to detect a fault on the IN pins. The FLAG pin
goes low when input voltage exceeds OVLO threshold or drops below UVLO threshold or when TSD
is exceeded. Since the FLAG pin is open drain functionality, an external pull−up resistor to V
CC
must
be added. (Minimum 10 kW).
Ground
Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the
output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to
GND to a pull down or to a I/O pin. This pin does not have an impact on the fault detection.
3 or A3
4 or B3
OUT
FLAG
OUTPUT
OUTPUT
5 or B2
6 or B1
GND
EN
POWER
INPUT
MAXIMUM RATINGS
Rating
Minimum Voltage (IN to GND)
Minimum Voltage (All others to GND)
Maximum Voltage (IN to GND)
Maximum Voltage (All others to GND)
Maximum Current (UVLO<V
IN
<OVLO)
Maximum Peak Current (t
≤
1 ms, T
A
= 85°C)
Thermal Resistance, Junction−to−Air (Note 1)
Operating Ambient Temperature Range
Storage Temperature Range
Junction Operating Temperature
ESD Withstand Voltage (IEC 61000−4−2) (input only) when bypassed with 1.0
mF
capacitor
Human Body Model (HBM), Model = 2 (Note 2)
Machine Model (MM) Model = B (Note 3)
Moisture Sensitivity
Symbol
Vmin
in
Vmin
Vmax
in
Vmax
Imax
Imax
peak
R
qJA
T
A
T
stg
T
J
Vesd
Value
−0.3
−0.3
30
7.0
2.0
4.0
130
−40 to +85
−65 to +150
150
15 Air, 8.0 Contact
2000
200
Level 1
Unit
V
V
V
V
A
A
°C/W
°C
°C
°C
kV
V
V
−
MSL
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. The R
qJA
is highly dependent on the PCB heat sink area (connected to pin 7).
2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114.
3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
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3
NCP391
ELECTRICAL CHARACTERISTICS − NCP391FCALT2G
(Min/Max limits values (−40°C < T
A
< +85°C) and V
in
= +5.0 V. Typical
values are T
A
= +25°C, unless otherwise noted.)
Characteristic
Input Voltage Range
Undervoltage Lockout Threshold (Note 4)
NCP391FCAL
Undervoltage Lockout Hysteresis
Overvoltage Lockout Threshold (Note 4)
NCP391FCAL
Overvoltage Lockout Hysteresis
NCP391FCAL
V
in
versus V
out
Resistance
Supply Quiescent Current
R
DS(on)
Idd
V
in
= 5.0 V, EN = GND,
Load connected to V
out
No load. EN = 5.0 V
No load. EN = Gnd
UVLO Supply Current
MOSFET Leakage
FLAG
Output Low Voltage
Idd
uvlo
I
vdss
Vol
flag
V
IN
= 2.7 V
V
IN
= 28 V
1.2 V < V
IN
< UVLO
Sink 50
mA
on/FLAG pin
V
IN
> OVLO
Sink 1.0 mA on FLAG pin
FLAG
Leakage Current
EN
Voltage High
EN
Voltage Low
EN
Leakage Current
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
TIMINGS
Startup Delay
FLAG
Going Up Delay
Output Turn Off Time
ton
tstart
toff
From V
in
> UVLO to V
out
= 0.3 V
(See Figures 3 & 7)
From V
out
= 0.3 V to FLAG = 1.2 V
(See Figures 3 & 9)
From V
in
> OVLO to V
out
< = 0.3 V
(See Figures 4 & 8)
V
in
increasing from 5.0 V to 8.0 V
at 3.0 V/ms
Rload connected on V
out
From V
in
> OVLO to FLAG < =
0.4 V (See Figures 4 & 10)
V
in
increasing from 5.0 V to 8.0 V
at 3.0 V/ms
Rload connected on V
out
From EN > = 1.2 V to
V
out
< 0.3 V
Rload = 5.0
W
(See Figures 5 & 12)
6.0
6.0
−
10
10
1.5
14
14
5.0
ms
ms
ms
FLAG
leak
Vih
Vol
EN
leak
t
SD
t
SDhyst
FLAG level = 5.0 V
−
−
EN = 5.0 V or GND
−
−
Symbol
V
in
UVLO
UVLO
hyst
OVLO
OVLO
hyst
Conditions
−
V
in
falls below UVLO threshold
from 5 V to 2.7 V
V
in
rises above UVLO + UVLO
hyst
V
in
rises above OVLO threshold
7.16
V
in
falls below OVLO + OVLO
hyst
50
−
−
−
−
−
−
−
−
1.2
−
−
−
−
100
120
70
90
60
10
20
−
1.0
−
−
1.0
150
15
150
200
150
170
−
500
400
400
−
−
0.4
−
−
−
mW
mA
mA
mA
nA
mV
mV
nA
V
V
nA
°C
°C
7.4
7.65
mV
Min
1.2
2.8
30
Typ
−
2.95
60
Max
28
3.1
90
mV
V
Unit
V
V
Alert Delay
tstop
−
1.0
−
ms
Disable Time
tdis
−
1.0
5.0
ms
NOTE: Electrical parameters are guaranteed by correlation across the full range of temperature.
4. Additional UVLO and OVLO thresholds ranging from UVLO and from OVLO can be manufactured. Contact your ON Semiconductor
representative for availability.
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4
NCP391
ELECTRICAL CHARACTERISTICS − NCP391FCCADT2G
(Min/Max limits values (−40°C < T
A
< +85°C) and V
in
= +4.2 V. Typical
values are T
A
= +25°C, unless otherwise noted.)
Characteristic
Input Voltage Range
Undervoltage Lockout Threshold (Note 5)
Undervoltage Lockout Hysteresis
Overvoltage Lockout Threshold (Note 5)
Overvoltage Lockout Hysteresis
V
in
versus V
out
Resistance
Supply Quiescent Current
Symbol
V
in
UVLO
UVLO
hyst
OVLO
OVLO
hyst
R
DS(on)
Idd
Conditions
−
V
in
falls below UVLO threshold
from 4.2 V to 2.7 V
V
in
rises above UVLO + UVLO
hyst
V
in
rises above OVLO threshold
4.8
V
in
falls below OVLO + OVLO
hyst
50
V
in
= 4.2 V, EN = GND,
Load connected to V
out
No load. EN = 4.2 V
No load. EN = Gnd
UVLO Supply Current
MOSFET Leakage
FLAG
Output Low Voltage
Idd
uvlo
I
vdss
Vol
flag
V
IN
= 2.7 V
V
IN
= 28 V
1.2 V < V
IN
< UVLO
Sink 50
mA
on/FLAG pin
V
IN
> OVLO
Sink 1.0 mA on FLAG pin
FLAG
Leakage Current
EN
Voltage High
EN
Voltage Low
EN
Leakage Current
Thermal Shutdown Temperature
Thermal Shutdown Hysteresis
TIMINGS
Startup Delay
FLAG
Going Up Delay
Output Turn Off Time
ton
tstart
toff
From V
in
> UVLO to V
out
= 0.3 V
(See Figures 3 & 7)
From V
out
= 0.3 V to FLAG = 1.2 V
(See Figures 3 & 9)
From V
in
> OVLO to V
out
< = 0.3 V
(See Figures 4 & 8)
V
in
increasing from 4.2 V to 8.0 V
at 3.0 V/ms
Rload connected on V
out
From V
in
> OVLO to FLAG < =
0.4 V (See Figures 4 & 10)
V
in
increasing from 4.2 V to 8.0 V
at 3.0 V/ms
Rload connected on V
out
From EN > = 1.2 V to
V
out
< 0.3 V
Rload = 5.0
W
(See Figures 5 & 12)
6.0
6.0
−
10
10
1.5
14
14
5.0
ms
ms
ms
FLAG
leak
Vih
Vol
EN
leak
t
SD
t
SDhyst
FLAG level = 4.2 V
−
−
EN = 4.2 V or GND
−
−
−
−
−
−
−
−
−
−
1.2
−
−
−
−
100
120
70
90
60
10
20
−
1.0
−
−
1.0
150
15
150
200
150
170
−
500
400
400
−
4.95
0.4
−
−
−
mW
mA
mA
mA
nA
mV
mV
nA
V
V
nA
°C
°C
4.95
5.1
mV
Min
1.2
2.8
30
Typ
−
2.95
60
Max
28
3.1
90
mV
V
Unit
V
V
Alert Delay
tstop
−
1.0
−
ms
Disable Time
tdis
−
1.0
5.0
ms
NOTE: Electrical parameters are guaranteed by correlation across the full range of temperature.
5. Additional UVLO and OVLO thresholds ranging from UVLO and from OVLO can be manufactured. Contact your ON Semiconductor
representative for availability.
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5
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