January 2001
Si4884DY
Single N-Channel Logic Level PWM Optimized PowerTrench
®
MOSFET
General Description
This N-Channel Logic Level MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers.
The MOSFET features faster switching and lower gate
charge than other MOSFETs with comparable R
DS(ON)
specifications.
The result is a MOSFET that is easy and safer to drive (even
at very high frequencies), and DC/DC power supply designs
with higher overall efficiency.
Features
11.5 A, 30 V. R
DS(ON)
= 0.010
Ω
@ V
GS
= 10 V
R
DS(ON)
= 0.015
Ω
@ V
GS
= 4.5 V.
Optimized for use in switching DC/DC converters with
PWM controllers.
Very fast switching.
Low gate charge (typical Qg = 19 nC).
SOT-23
SuperSOT
TM
-6
SuperSOT
TM
-8
SO-8
SOT-223
SOIC-16
D
D
D
D
5
4
3
2
1
8
48
4
G
6
7
8
SO-8
pin
1
S
S
S
Absolute Maximum Ratings
Symbol
Parameter
T
A
= 25
o
C unless other wise noted
Si4884DY
Units
V
DSS
V
GSS
I
D
P
D
Drain-Source Voltage
Gate-Source Voltage
Drain Current - Continuous
- Pulsed
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1a)
30
±20
11.5
50
2.5
1.2
1
-55 to 150
V
V
A
W
T
J
,T
STG
R
θ
JA
R
θ
JC
Operating and Storage Temperature Range
°C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
50
25
°C/W
°C/W
Si4884DY Rev.A
© 2001 Fairchild Semiconductor International
Electrical Characteristics
(
T
A
= 25
O
C unless otherwise noted )
Symbol
Parameter
Conditions
Min
Typ
Max
Units
OFF CHARACTERISTICS
BV
DSS
Drain-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Zero Gate Voltage Drain Current
V
GS
= 0 V, I
D
= 250 µA
I
D
= 250 µA, Referenced to 25 C
V
DS
= 24 V, V
GS
= 0 V
T
J
= 55°C
V
GS
= 20 V, V
DS
= 0 V
V
GS
= -20 V, V
DS
= 0 V
V
DS
= V
GS
, I
D
= 250 µA
I
D
= 250 µA, Referenced to 25 C
V
GS
= 10 V, I
D
= 11.5 A
T
J
=125°C
V
GS
= 4.5 V, I
D
= 9.5 A
o
o
30
23
1
10
100
-100
V
mV/
o
C
µA
µA
nA
nA
∆
BV
DSS
/
∆
T
J
I
DSS
I
GSSF
I
GSSR
V
GS(th)
Gate - Body Leakage, Forward
Gate - Body Leakage, Reverse
(Note 2)
ON CHARACTERISTICS
Gate Threshold Voltage
Gate Threshold Voltage Temp.Coefficient
Static Drain-Source On-Resistance
1
1.7
-5
0.0085
0.014
0.0125
3
V
mV/
o
C
∆
V
GS(th)
/
∆
T
J
R
DS(ON)
0.01
0.017
0.015
Ω
I
D(ON)
g
FS
C
iss
C
oss
C
rss
t
D(on)
t
r
t
D(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
Notes:
On-State Drain Current
Forward Transconductance
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(Note 2)
V
GS
= 10 V, V
DS
= 5 V
V
DS
= 15 V, I
D
= 11.5 A
V
DS
= 15 V, V
GS
= 0 V,
f = 1.0 MHz
50
40
2070
510
235
A
S
pF
pF
pF
21
18
58
23
27
ns
ns
ns
ns
nC
nC
nC
2.1
A
V
DYNAMIC CHARACTERISTICS
SWITCHING CHARACTERISTICS
Turn - On Delay Time
Turn - On Rise Time
Turn - Off Delay Time
Turn - Off Fall Time
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DS
= 15 V, I
D
= 1 A
V
GS
= 10 V , R
GEN
=
6 Ω
13
10
36
13
V
DS
= 15 V, I
D
= 11.5 A,
V
GS
= 5 V
19
7
6
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
Maximum Continuous Drain-Source Diode Forward Current
Drain-Source Diode Forward Voltage
V
GS
= 0 V, I
S
= 2.1 A
(Note 2)
1.2
1. R
θ
JA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
θ
JC
is guaranteed by
design while R
θ
CA
is determined by the user's board design.
a. 50
O
C/W on a 1 in
2
pad
of 2oz copper.
b. 105
O
C/W on a 0.04 in
2
pad of 2oz copper.
c. 125
O
C/W on a 0.006 in
2
pad
of 2oz copper.
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
Si4884DY Rev.A
Typical Electrical Characteristics
50
I
D
, DRAIN-SOURCE CURRENT (A)
30
R
DS(ON)
, NORMALIZED
40
6.0
5.0
4.0
DRAIN-SOURCE ON-RESISTANCE
V
GS
= 10V
3
4.5
2.5
V
GS
= 3.5V
2
4.0
4.5
3.5
20
1.5
5.0
6.0
10
10
3.0
0
0
0.5
1
1.5
2
2.5
V
DS
, DRAIN-SOURCE VOLTAGE (V)
1
0.5
0
10
20
30
40
50
I
D
, DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1.8
DRAIN-SOURCE ON-RESISTANCE
1.6
1.4
1.2
1
0.8
0.6
-50
DRAIN-SOURCE ON-RESISTANCE
I
D
= 11.5A
V
GS
=10V
0.04
I
D
= 11.5A
0.03
R
DS(ON)
, NORMALIZED
R
DS(ON)
,(OHM)
0.02
T
A
= 125
o
C
0.01
T
A
= 25
o
C
0
-25
0
25
50
75
100
125
150
2
4
V
GS
6
8
10
T
J
, JUNCTION TEMPERATURE (°C)
,GATE-SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation
Temperature.
with
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
50
25°C
125°C
I
S
, REVERSE DRAIN CURRENT (A)
V
DS
= 10V
I
D
, DRAIN CURRENT (A)
40
T
J
= -55°C
50
10
V
GS
=0V
TJ = 125°C
1
0.1
0.01
0.001
0.0001
0.2
30
25°C
-55°C
20
10
0
0
1
2
3
4
5
V
GS
, GATE TO SOURCE VOLTAGE (V)
0.4
0.6
0.8
1
1.2
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage
Variation with Source Current
and Temperature.
Si4884DY Rev.A
Typical Electrical And Thermal Characteristics
10
V
GS
, GATE-SOURCE VOLTAGE (V)
3000
I
D
= 11.5A
8
V
DS
= 10V
15V
CAPACITANCE (pF)
2000
C iss
20V
6
1000
4
500
C oss
2
C rss
200
0
0
10
20
Q
g
, GATE CHARGE (nC)
30
40
f = 1 MHz
V
GS
= 0V
0.2
0.5
1
2
5
10
20
30
100
0.1
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
100
50
I
D
, DRAIN CURRENT (A)
20
10
3
1
RD
Figure 8. Capacitance Characteristics.
50
S(O
LI
N)
MIT
100
us
1m
s
POWER (W)
40
10m
s
100
ms
1s
V
GS
= 10V
SINGLE PULSE
R
θ
JA
= See Note 1c
T
A
= 25°C
0.2
0.5
1
2
SINGLE PULSE
R
θ
JA
=See Note 1c
T
A
= 25°C
30
10
s
DC
20
0.1
10
0.01
0.1
0
0.001
0.01
0.1
1
10
100
300
5
10
30
50
SINGLE PULSE TIME (SEC)
V
DS
, DRAIN-SOURCE VOLTAGE (V)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power
Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
0.5
0.2
0.1
0.05
0.02
0.01
0.005
0.002
0.001
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
D = 0.5
0.2
0.1
0.05
P(pk)
0.02
0.01
Single Pulse
R
θ
JA
(t) = r(t) * R
θ
JA
R
θ
JA
=See Note 1c
t
1
t
2
T
J
- T
A
= P * R
θ
JA (t)
Duty Cycle, D = t
1
/t
2
100
300
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1c.
Transient thermal response will change depending on the circuit board design.
Si4884DY Rev.A
SOIC-8 Tape and Reel Data
SOIC(8lds) Packaging
Configuration:
Figure 1.0
Packaging Description:
EL ECT ROST AT IC
SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC
EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S
TNR D ATE
PT NUMB ER
PEEL STREN GTH MIN ___ __ ____ __ ___gms
MAX ___ ___ ___ ___ _ gms
Antistatic Cover Tape
ESD Label
SOIC-8 parts are shipped in tape. The carrier tape is
made from a dissipative (carbon filled) polycarbonate
resin. The cover tape is a multilayer film (Heat Activated
Adhesive in nature) primarily composed of polyester film,
adhesive layer, sealant, and anti-static sprayed agent.
These reeled parts in standard option are shipped with
2,500 units per 13" or 330cm diameter reel. The reels are
dark blue in color and is made of polystyrene plastic (anti-
static coated). Other option comes in 500 units per 7" or
177cm diameter reel. This and some other options are
further described in the Packaging Information table.
These full reels are individually barcode labeled and
placed inside a standard intermediate box (illustrated in
figure 1.0) made of recyclable corrugated brown paper.
One box contains two reels maximum. And these boxes
are placed inside a barcode labeled shipping box which
comes in different sizes depending on the number of parts
shipped.
Static Dissipative
Embossed Carrier Tape
F63TNR
Label
Customized
Label
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
F852
NDS
9959
SOIC (8lds) Packaging Information
Pin 1
D84Z
TNR
500
Packaging Option
Packaging type
Qty per Reel/Tube/Bag
Standard
(no flow code)
TNR
2,500
L86Z
Rail/Tube
95
F011
TNR
4,000
SOIC-8 Unit Orientation
Reel Size
Box Dimension (mm)
Max qty per Box
Weight per unit (gm)
Weight per Reel (kg)
13" Dia
343x64x343
5,000
0.0774
0.6060
-
530x130x83
30,000
0.0774
-
13" Dia
343x64x343
8,000
0.0774
0.9696
7" Dia
184x187x47
1,000
0.0774
0.1182
Note/Comments
343mm x 342mm x 64mm
Standard Intermediate box
ESD Label
F63TNR Label sample
LOT: CBVK741B019
FSID: FDS9953A
QTY: 2500
SPEC:
F63TNLabel
F63TN Label
ESD Label
(F63TNR)3
D/C1: D9842
D/C2:
QTY1:
QTY2:
SPEC REV:
CPN:
N/F: F
SOIC(8lds) Tape Leader and Trailer
Configuration:
Figure 2.0
Carrier Tape
Cover Tape
Components
Trailer Tape
640mm minimum or
80 empty pockets
Leader Tape
1680mm minimum or
210 empty pockets
©2000 Fairchild Semiconductor International
July 1999, Rev. B
模拟电子
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
