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CY62256EV18

产品描述32K X 8 STANDARD SRAM, 70 ns, PDSO28
产品类别存储   
文件大小268KB,共14页
制造商Cypress(赛普拉斯)
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CY62256EV18概述

32K X 8 STANDARD SRAM, 70 ns, PDSO28

32K × 8 标准存储器, 70 ns, PDSO28

CY62256EV18规格参数

参数名称属性值
功能数量1
端子数量28
最大工作温度85 Cel
最小工作温度-40 Cel
最大供电/工作电压2.25 V
最小供电/工作电压1.65 V
额定供电电压1.8 V
最大存取时间70 ns
加工封装描述0.300 INCH, LEAD FREE, NSOIC-28
状态ACTIVE
工艺CMOS
包装形状RECTANGULAR
包装尺寸SMALL OUTLINE
表面贴装Yes
端子形式GULL WING
端子间距1.27 mm
端子涂层NOT SPECIFIED
端子位置DUAL
包装材料PLASTIC/EPOXY
温度等级INDUSTRIAL
内存宽度8
组织32K X 8
存储密度262144 deg
操作模式ASYNCHRONOUS
位数32768 words
位数32K
内存IC类型STANDARD SRAM
串行并行PARALLEL

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CY62256EV18 MoBL
®
256-Kbit (32 K × 8) Static RAM
256-Kbit (32 K × 8) Static RAM
Features
Functional Description
The CY62256EV18 is a high performance CMOS static RAM
module organized as 32 K words by 8-bits. This device features
advanced circuit design to provide ultra low active current. This
is ideal for providing More Battery Life™ (MoBL
®
) in portable
applications such as cellular telephones. The device also has an
automatic power-down feature that significantly reduces power
consumption when addresses are not toggling. Placing the
device in standby mode reduces power consumption by more
than 99 percent when deselected (CE HIGH). The eight input
and output pins (I/O
0
through I/O
7
) are placed in a high
impedance state when the device is deselected (CE HIGH), the
outputs are disabled (OE HIGH), or a write operation is in
progress (CE LOW and WE LOW).
To write to the device, take chip enable (CE) LOW and write
enable (WE) LOW. Data on the eight I/O pins is then written into
the location specified on the address pin (A
0
through A
14
).
To read from the device, take chip enable (CE LOW) and output
enable (OE) LOW while forcing write enable (WE) HIGH. Under
these conditions, the contents of the memory location specified
by the address pins appear on the I/O pins.
Very high speed: 70 ns
Temperature ranges:
Industrial: –40 °C to +85 °C
Wide voltage range: 1.65 V to 2.25 V
Pin compatible with CY62256N
Ultra low standby power
Typical standby current: 1 µA
Maximum standby current: 4 µA
Ultra low active power
Typical active current: 1.3 mA at f = 1 MHz
Easy memory expansion with CE and OE features
Automatic power-down when deselected
Complementary metal oxide semiconductor (CMOS) for
optimum speed and power
Offered in Pb-free 28-pin Narrow SOIC package
Logic Block Diagram
INPUTBUFFER
A
10
A
9
A
8
A
7
A
6
A
5
A
4
A
3
A
2
CE
WE
OE
A
14
A
13
A
12
A
11
A
1
A
0
ROW DECODER
I/O
0
I/O
1
SENSE AMPS
I/O
2
I/O
3
I/O
4
I/O
5
32K x 8
Y
ARRA
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
Cypress Semiconductor Corporation
Document #: 001-69650 Rev. *B
198 Champion Court
San Jose
,
CA 95134-1709
408-943-2600
Revised September 4, 2012

 
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