NLU2G16
Dual Non-Inverting Buffer
The NLU2G16 MiniGatet is an advanced high−speed CMOS dual
non−inverting buffer in ultra−small footprint.
The NLU2G16 input and output structures provide protection when
voltages up to 7.0 V are applied, regardless of the supply voltage.
Features
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MARKING
DIAGRAMS
UDFN6
1.2 x 1.0
CASE 517AA
M
•
•
•
•
•
•
•
High Speed: t
PD
= 3.5 ns (Typ) @ V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 1
mA
(Max) at T
A
= 25°C
Power Down Protection Provided on inputs
Balanced Propagation Delays
Overvoltage Tolerant (OVT) Input and Output Pins
Ultra−Small Packages
These are Pb−Free Devices
C
1
IN A1
1
6
OUT Y1
1
ULLGA6
1.0 x 1.0
CASE 613AD
CM
GND
2
5
V
CC
1
ULLGA6
1.2 x 1.0
CASE 613AE
CM
IN A2
3
4
OUT Y2
1
ULLGA6
1.45 x 1.0
CASE 613AF
M
4
Figure 1. Pinout
(Top View)
IN A1
IN A2
1
1
OUT Y1
OUT Y2
UDFN6
1.0 x 1.0
CASE 517BX
1
UDFN6
1.45 x 1.0
CASE 517AQ
1
C or 4
M
= Device Marking
= Date Code
XM
XM
Figure 2. Logic Symbol
PIN ASSIGNMENT
1
2
3
4
5
6
IN A1
GND
IN A2
OUT Y2
V
CC
OUT Y1
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
FUNCTION TABLE
A
L
H
Y
L
H
©
Semiconductor Components Industries, LLC, 2012
July, 2012
−
Rev. 3
1
Publication Order Number:
NLU2G16/D
NLU2G16
MAXIMUM RATINGS
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
O
I
CC
I
GND
T
STG
T
L
T
J
MSL
F
R
I
LATCHUP
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source/Sink Current
DC Supply Current Per Supply Pin
DC Ground Current per Ground Pin
Storage Temperature Range
Lead Temperature, 1 mm from Case for 10 Seconds
Junction Temperature Under Bias
Moisture Sensitivity
Flammability Rating Oxygen
Index: 28 to 34
V
IN
< GND
V
OUT
< GND
Parameter
Value
−0.5
to +7.0
−0.5
to +7.0
−0.5
to +7.0
−20
±20
±12.5
±25
±25
−65
to +150
260
150
Level 1
UL 94 V−0 @ 0.125 in
±500
mA
Unit
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
Latchup Performance Above V
CC
and Below GND at 125°C (Note 2)
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2 ounce copper trace no air flow.
2. Tested to EIA / JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
V
OUT
T
A
Dt/DV
Positive DC Supply Voltage
Digital Input Voltage
Output Voltage
Operating Free−Air Temperature
Input Transition Rise or Fall Rate
V
CC
= 3.3 V
±
0.3 V
V
CC
= 5.0 V
±
0.5 V
Parameter
Min
1.65
0
0
−55
0
0
Max
5.5
5.5
5.5
+125
100
20
Unit
V
V
V
°C
ns/V
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2
NLU2G16
DC ELECTRICAL CHARACTERISTICS
V
CC
(V)
1.65
2.3 to
5.5
V
IL
Low−Level
Input Voltage
1.65
2.3 to
5.5
V
OH
High−Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OH
=
−50
mA
V
IN
= V
IH
or V
IL
I
OH
=
−4
mA
I
OH
=
−8
mA
V
OL
Low−Level
Output Voltage
V
IN
= V
IH
or V
IL
I
OL
= 50
mA
V
IN
= V
IH
or V
IL
I
OL
= 4 mA
I
OL
= 8 mA
I
IN
I
CC
Input Leakage
Current
Quiescent
Supply Current
0
v
V
IN
v
5.5 V
0
v
V
IN
v
V
CC
2.0
3.0
4.5
3.0
4.5
2.0
3.0
4.5
3.0
4.5
0 to
5.5
5.5
1.9
2.9
4.4
2.58
3.94
0
0
0
0.1
0.1
0.1
0.36
0.36
±0.1
1.0
2.0
3.0
4.5
T
A
= 25
5C
Min
0.75 x
V
CC
0.70 x
V
CC
0.25 x
V
CC
0.30 x
V
CC
1.9
2.9
4.4
2.48
3.80
0.1
0.1
0.1
0.44
0.44
±1.0
10
Typ
Max
T
A
=
+855C
Min
0.75 x
V
CC
0.70 x
V
CC
0.25 x
V
CC
0.30 x
V
CC
1.9
2.9
4.4
2.34
3.66
0.1
0.1
0.1
0.52
0.52
±1.0
40
mA
mA
0.25 x
V
CC
0.30 x
V
CC
V
V
Max
T
A
=
−555C
to
+1255C
Min
Max
Unit
V
Symbol
V
IH
Parameter
Low−Level
Input Voltage
Conditions
V
V
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
= 3.0 nS)
V
CC
(V)
3.0 to
3.6
4.5 to
5.5
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(Note 3)
5.0
Test
Condition
C
L
= 15 pF
C
L
= 50 pF
C
L
= 15 pF
C
L
= 50 pF
T
A
= 25
5C
Min
Typ
4.5
6.4
3.5
4.5
4.0
8.0
Max
7.1
10.6
5.5
7.5
10
T
A
=
+855C
Min
Max
8.5
12
6.5
8.5
10
T
A
=
−555C
to
+1255C
Min
Max
10
14.5
8.0
10
10
pF
pF
Unit
ns
Symbol
t
PLH
,
t
PHL
Parameter
Propagation Delay,
Input A to Output Y
3. C
PD
is defined as the value of the internal equivalent capacitance which is calculated from the dynamic operating current consumption without
load. Average operating current can be obtained by the equation I
CC(OPR)
= C
PD
•
V
CC
•
f
in
+ I
CC
. C
PD
is used to determine the no−load
dynamic power consumption: P
D
= C
PD
•
V
CC2
•
f
in
+ I
CC
•
V
CC.
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3
NLU2G16
SWITCHING WAVEFORMS
TEST POINT
V
CC
A
t
PLH
50% V
CC
Y
50%
t
PHL
GND
DEVICE
UNDER
TEST
OUTPUT
C
L
*
Figure 3. Switching Waveforms
*Includes all probe and jig capacitance
Figure 4. Test Circuit
ORDERING INFORMATION
Device
NLU2G16MUTCG
NLU2G16AMX1TCG
NLU2G16BMX1TCG
NLU2G16CMX1TCG
NLU2G16AMUTCG
NLU2G16CMUTCG
Package
UDFN6, 1.2 x 1.0, 0.4P
(Pb−Free)
ULLGA6, 1.45 x 1.0, 0.5P
(Pb−Free)
ULLGA6, 1.2 x 1.0, 0.4P
(Pb−Free)
ULLGA6, 1.0 x 1.0, 0.35P
(Pb−Free)
UDFN6, 1.45 x 1.0, 0.5P
(Pb−Free)
UDFN6, 1.0 x 1.0, 0.35P
(Pb−Free)
Shipping
†
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
3000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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4
NLU2G16
PACKAGE DIMENSIONS
UDFN6 1.45x1.0, 0.5P
CASE 517AQ
ISSUE O
D
A
B
L1
PIN ONE
REFERENCE
L
L
E
OPTIONAL
CONSTRUCTIONS
DETAIL A
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.30 mm FROM THE TERMINAL TIP.
DIM
A
A1
A2
b
D
E
e
L
L1
MILLIMETERS
MIN
MAX
0.45
0.55
0.00
0.05
0.07 REF
0.20
0.30
1.45 BSC
1.00 BSC
0.50 BSC
0.30
0.40
−−−
0.15
0.10 C
0.10 C
DETAIL B
0.05 C
6X
A
A1
SIDE VIEW
e
1
3
OPTIONAL
CONSTRUCTIONS
0.05 C
A2
C
SEATING
PLANE
6X
L
DETAIL A
6
4
6X
b
0.10 C A B
0.05 C
NOTE 3
BOTTOM VIEW
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5
ÉÉ
ÉÉ
ÉÉÉ
ÉÉÉ
TOP VIEW
EXPOSED Cu
MOLD CMPD
DETAIL B
MOUNTING FOOTPRINT
PACKAGE
OUTLINE
0.30
6X
1.24
0.53
6X
1
0.50
PITCH
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
FPGA/CPLD
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