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NLSF3T125_11

产品描述Quad Bus Buffer
文件大小120KB,共6页
制造商ON Semiconductor(安森美)
官网地址http://www.onsemi.cn
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NLSF3T125_11概述

Quad Bus Buffer

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NLSF3T125
Quad Bus Buffer
with 3−State Control Inputs
The NLSF3T125 is a high speed CMOS quad bus buffer fabricated
with silicon gate CMOS technology. It achieves high speed operation
similar to equivalent Bipolar Schottky TTL while maintaining CMOS
low power dissipation.
The NLSF3T125 requires the 3−state control input (OE) to be set
High to place the output into the high impedance state.
The T125 inputs are compatible with TTL levels. This device can be
used as a level converter for interfacing 3.3 V to 5.0 V, because it has
full 5.0 V CMOS level output swings.
The NLSF3T125 input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when V
CC
= 0 V. These
input and output structures help prevent device destruction caused by
supply voltage
input/output voltage mismatch, battery backup, hot
insertion, etc.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output. The
inputs tolerate voltages up to 7.0 V, allowing the interface of 5.0 V
systems to 3.0 V systems.
Features
http://onsemi.com
1
QFN−16
CASE 485G
MARKING DIAGRAM
NLSF3
T125
ALYWG
G
NLSF3T125
A
L
Y
W
G
= Specific Device Code
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
High Speed: t
PD
= 3.8 ns (Typ) at V
CC
= 5.0 V
Low Power Dissipation: I
CC
= 4.0
mA
(Max) at T
A
= 25°C
TTL−Compatible Inputs: V
IL
= 0.8 V; V
IH
= 2.0 V
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: V
OLP
= 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance: Human Body Model; > 2000 V,
Machine Model; > 200 V
Chip Complexity: 72 FETs or 18 Equivalent Gates
These Devices are Pb−Free and are RoHS Compliant
FUNCTION TABLE
NLSF3T125
Inputs
A
H
L
X
OE
L
L
H
Output
Y
H
L
Z
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping
NLSF3T125MNR2G QFN−16 3000/Tape & Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
©
Semiconductor Components Industries, LLC, 2011
June, 2011
Rev. 5
1
Publication Order Number:
NLSF3T125/D

 
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