MITSUBISHI SEMICONDUCTORS <HVIC>
M81713FP
HIGH VOLTAGE HALF BRIDGE DRIVER
DESCRIPTION
M81713FP is high voltage Power MOSFET and IGBT mod-
ule driver for half bridge applications.
PIN CONFIGURATION (TOP VIEW)
FEATURES
¡FLOATING
SUPPLY VOLTAGE ................................. 600V
¡OUTPUT
CURRENT .............................................
±500mA
¡HALF
BRIDGE DRIVER
¡SINGLE
INPUT TYPE
¡INTERNALLY
SET DEADTIME
¡UNDERVOLTAGE
LOCKOUT
¡SOP-8
PACKAGE
APPLICATIONS
MOSFET and IGBT module inverter driver for PDP, HID
lamp, refrigerator, air-conditioner, washing machine, AC-
servomotor and general purpose.
1. V
CC
2. IN
3. GND
4. LO
8. V
B
7. HO
6. V
S
5. NC
NC:NO CONNECTION
Outline:8P2S
BLOCK DIAGRAM
8
V
B
V
REG
HV
LEVEL
SHIFT
Ponr
UV DETECT
FILTER
INTER
LOCK
RQ
R
S
7
HO
PULSE
GEN
IN
2
DEAD
TIME
V
REG
/V
CC
LEVEL
SHIFT
Ponr
UV DETECT
FILTER
6
1
V
S
V
CC
4
LO
DELAY
3
GND
Mar. 2006
MITSUBISHI SEMICONDUCTORS <HVIC>
M81713FP
HIGH VOLTAGE HALF BRIDGE DRIVER
ABSOLUTE MAXIMUM RATINGS
(Ta = 25
°
C unless otherwise specified)
Symbol
V
B
V
S
V
BS
V
HO
V
CC
V
LO
V
IN
dV
S
/dt
Pd
K
q
Rth(j-c)
Tj
Topr
Tstg
Parameter
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Supply Voltage
High Side Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Input Voltage
Allowable Offset Voltage Transient
Package Power Dissipation
Linear Derating Factor
Junction-Case Thermal Resistance
Junction Temperature
Operation Temperature
Storage Temperature
Test conditions
Ratings
–0.5 ~ 624
V
B
–24 ~ V
B
+0.5
V
BS
= V
B
–V
S
–0.5 ~ 24
V
S
–0.5 ~ V
B
+0.5
–0.5 ~ 24
–0.5 ~ V
CC
+0.5
–0.5 ~ V
CC
+0.5
±50
0.55
5.5
50
–20 ~ 125
–20 ~ 100
–40 ~ 125
Unit
V
V
V
V
V
V
V
V/ns
W
mW/°C
°C/W
°C
°C
°C
Ta = 25°C, On Board
Ta > 25°C, On Board
RECOMMENDED OPERATING CONDITIONS
Symbol
V
B
V
S
V
BS
V
HO
V
CC
V
LO
V
IN
Parameter
High Side Floating Supply Absolute Voltage
High Side Floating Supply Offset Voltage
High Side Floating Supply Voltage
High Side Output Voltage
Low Side Fixed Supply Voltage
Low Side Output Voltage
Logic Input Voltage
V
B
> 10V
V
BS
= V
B
–V
S
Test conditions
Min.
V
S
+10
–5
10
V
S
10
0
0
Limits
Typ.
—
—
—
—
—
—
—
Max.
V
S
+20
500
20
V
B
20
V
CC
V
CC
Unit
V
V
V
V
V
V
V
* For proper operation, the device should be used within the recommended conditions.
THERMAL DERATING FACTOR CHARACTERISTIC (MAXIMUM RATING)
0.7
Package Power Dissipation Pd (W)
0.6
0.5
0.4
0.3
0.2
0.1
0
0
25
50
75
100
125
150
Temperature Ta (°C)
Mar. 2006
MITSUBISHI SEMICONDUCTORS <HVIC>
M81713FP
HIGH VOLTAGE HALF BRIDGE DRIVER
ELECTRICAL CHARACTERISTICS
(Ta = 25
°
C, V
CC
= V
BS
( = V
B
–V
S
) = 15V, unless otherwise specified)
Symbol
I
FS
I
BS
I
CC
V
OH
V
OL
V
IH
V
IL
I
IH
I
IL
V
BSuvr
V
BSuvh
t
VBSuv
V
CCuvr
V
CCuvh
t
VCCuv
I
OH
I
OL
R
OH
R
OL
tDEAD
VP
onr
tP
onr(FIL)
t
dLH
t
dHL
t
rH
t
fH
t
rL
t
fL
Parameter
Floating Supply Leakage Current
V
BS
Standby Current
V
CC
Standby Current
High Level Output Voltage
Low Level Output Voltage
High Level Input Threshold Voltage
Low Level Input Threshold Voltage
High Level Input Bias Current
Low Level Input Bias Current
V
BS
Supply UV Reset Voltage
V
BS
Supply UV Hysteresis Voltage
V
BS
Supply UV Filter Time
V
CC
Supply UV Reset Voltage
V
CC
Supply UV Hysteresis Voltage
V
CC
Supply UV Filter Time
Output High Level Short Circuit Pulsed Current
Output Low Level Short Circuit Pulsed Current
Output High Level On Resistance
Output Low Level On Resistance
Dead Time LO Turn-Off to HO Turn-On
& HO Turn-Off to LO Turn-On
Power On Reset Voltage
Power On Reset Filter Time
Turn-On Propagation Delay
Turn-Off Propagation Delay
High Side Turn-On Rise Time
High Side Turn-Off Fall Time
Low Side Turn-On Rise Time
Low Side Turn-Off Fall Time
CL = 1000pF between HO-V
S
, LO-GND
CL = 1000pF between HO-V
S
, LO-GND
CL = 1000pF between HO-V
S
CL = 1000pF between HO-V
S
CL = 1000pF between LO-GND
CL = 1000pF between LO-GND
V
O
= 0V, PW < 10µs
V
O
= 15V, PW < 10µs
I
O
= –200mA, R
OH
= (V
OH
–V
O
)/I
O
I
O
= 200mA, R
OL
= V
O
/I
O
CL = 1000pF between HO-V
S
, LO-GND
Test conditions
V
B
= V
S
= 600V
IN = 0V
IN = 0V
I
O
= 0A, LO, HO
I
O
= 0A, LO, HO
HIN, LIN
HIN, LIN
V
IN
= 5V
V
IN
= 0V
Limits
Min.
—
—
0.2
13.8
—
2.1
0.6
—
—
8.0
0.5
—
8.0
0.5
—
—
—
—
—
0.5
—
300
0.6
0.1
—
—
—
—
Typ.*
—
0.2
0.5
14.4
—
3.0
1.5
25
—
8.9
0.7
7.5
8.9
0.7
7.5
–500
500
30
12
—
—
—
0.9
0.15
75
75
75
75
Max.
1.0
0.5
0.75
—
0.1
4.0
2.0
75
1
9.8
—
—
9.8
—
—
—
—
—
—
1.00
6
—
1.2
0.2
180
180
180
180
Unit
µA
mA
mA
V
V
V
V
µA
µA
V
V
µs
V
V
µs
mA
mA
Ω
Ω
µs
V
ns
µs
µs
ns
ns
ns
ns
* Typ. is not specified.
INPUT/OUTPUT TIMING DIAGRAM
IN
50%
50%
t
fL
HO
t
rH
90%
t
fH
90%
t
rL
10%
90%
LO
10%
t
dHL
t
dLH
tDEAD
t
dHL
t
dLH
10%
90%
10%
tDEAD
Mar. 2006
MITSUBISHI SEMICONDUCTORS <HVIC>
M81713FP
HIGH VOLTAGE HALF BRIDGE DRIVER
UV SEQUENCE
UV RESET UV TRIP
V
CC
t
VCCuv
UV RESET
UV TRIP
VP
onr
UV TRIP
t
VBSuv
UV RESET
UV TRIP
VP
onr
UV TRIP
t
VCCuv
UV RESET
VP
onr
UV RESET
V
B
IN
HO
LO
1.Input/Output Logic:
HO has positive logic with reference to IN. LO has negative logic with reference to IN.
2.Logic During UV (V
CC
, V
BS
) Error
Error Signal
UV error
(V
CC
)
UV error
(V
BS
)
HO
LO
LO is locked at “L” level as long as UV error for V
CC
is detected.
HO outputs “L” Level as long as UV error for V
CC
is detected.
After V
CC
exceeds V
CC
UV reset level, the lock for LO is
HO responds to IN if V
CC
exceeds V
CC
UV reset level.
removed and responds to IN signal.
HO is locked at “L” level as long as UV error for V
BS
is detected.
After V
BS
exceeds V
BS
UV reset level, the lock for HO is
removed following an “L” state of the IN signal, and then LO is independent of V
BS
to respond to IN.
HO responds to the input.
* IF UV error for V
CC
is detected when HO is in “H” level and the falling speed of V
CC
is exceeds 0.03V/µs, the off signal for HO might not be transmitted from
low side to high side and then HO stays “H”.
3.Allowable Supply Voltage Transient
It is recommended that supplying V
CC
firstly and supplying V
BS
secondly. In the case of shutting off supply voltage, it is
recommended to shut off V
BS
firstly and to shut off V
CC
secondly. At the time of starting V
CC
and V
BS
, power supply
should be increased slowly (below 50V/µs). If it is increased rapidly, output signal (HO or LO) may be “H”.
Mar. 2006
MITSUBISHI SEMICONDUCTORS <HVIC>
M81713FP
HIGH VOLTAGE HALF BRIDGE DRIVER
P
onr
(Power On Reset) SEQUENCE
UV RESET UV TRIP
V
CC
tP
onr(FIL)
UV RESET
V
B
tP
onr(FIL)
UV RESET
UV TRIP
VP
onr
UV TRIP
UV TRIP
UV RESET
UV TRIP
VP
onr
tP
onr(FIL)
UV RESET
UV TRIP
VP
onr
IN
HO
LO
PACKAGE OUTLINE
e
b
2
8
5
H
E
E
e
1
Recommended Mount Pad
1
4
F
A
Symbol
A
A
1
A
2
b
c
D
E
e
H
E
L
L
1
z
Z
1
x
y
b
2
e
1
I
2
G
D
b
e
y
x
M
A
2
A
1
c
z
Z
1
Detail G
Detail F
Dimension in Millimeters
Min
Nom
Max
–
–
1.9
0.05
–
–
–
1.5
–
0.35
0.4
0.5
0.13
0.15
0.2
4.8
5.0
5.2
4.2
4.4
4.6
–
1.27
–
5.9
6.2
6.5
0.2
0.4
0.6
–
0.9
–
–
0.595
–
–
–
0.745
–
–
0.25
–
–
0.1
0°
–
10°
–
0.76
–
–
5.72
–
1.27
–
–
L
1
L
I
2
Mar. 2006
FPGA/CPLD
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