Operating Temperature Range ....................... -40NC to +125NC
Storage Temperature Range........................... -65NC to + 150NC
Junction Temperature .....................................................+150NC
Lead Temperature (soldering, 10s) .............................. + 300NC
Soldering Temperature (reflow) .....................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACkAgE THERMAL CHARACTERISTICS (Note 1)
TDFN
Junction-to-Ambient Thermal Resistance (q
JA
) .......83.9°C/W
Junction-to-Case Thermal Resistance (q
JC
) ............37.0°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
DD
= 1.7V to 5.5V, V
H
= V
DD
, V
L
= GND, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 1.8V,
T
A
= +25°C.) (Note 2)
PARAMETER
RESOLuTION
256-Tap Family
Integral Nonlinearity (Note 3)
Differential Nonlinearity
Ratiometric Resistor Tempco
N
INL
DNL
(Note 3)
(DV
W
/V
W
)/DT, V
H
= V
DD
, V
L
= GND, no load
Charge pump enabled, 1.7V < V
DD
< 5.5V
MAX5394M
Charge pump disabled,
MAX5394N
2.6V < V
DD
< 5.5VS
MAX5394L
Charge pump enabled, 1.7V < V
DD
< 5.5V
MAX5394M
Charge pump disabled,
MAX5394N
2.6V < V
DD
< 5.5V
MAX5394L
Charge pump enabled, 1.7V < V
DD
< 5.5V
MAX5394M
Charge pump disabled,
MAX5394N
2.6V < V
DD
< 5.5V
MAX5394L
-1.0
-1.0
-1.5
-0.5
-0.5
-1.0
+0.5
+0.5
+1.0
+1.0
+1.0
+1.5
2
SYMBOL
CONDITIONS
MIN
256
-1.0
-0.5
TYP
MAx
uNITS
Tap
DC PERFORMANCE (VOLTAgE-DIVIDER MODE)
+1.0
+0.5
5
LSB
LSB
ppm/°C
Full-Scale Error (Code FFh)
LSB
Zero-Scale Error (Code 00h)
LSB
DC PERFORMANCE (VARIABLE RESISTOR MODE)
Integral Nonlinearity (Note 4)
R-INL
LSB
Maxim Integrated
MAX5394
Single, 256-Tap Volatile, SPI, Low-Voltage Linear
Taper Digital Potentiometer
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 1.7V to 5.5V, V
H
= V
DD
, V
L
= GND, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 1.8V,
T
A
= +25°C.) (Note 2)
PARAMETER
Differential Nonlinearity
Wiper Resistance (Note 5)
SYMBOL
R-DNL
R
WL
(Note 4)
Charge pump enabled, 1.7V < V
DD
< 5.5V
Charge pump disabled, 2.6V < V
DD
< 5.5V
Measured to GND
Measured to GND
No load
Wiper not connected
-25
CONDITIONS
MIN
-0.5
25
TYP
MAx
+0.5
50
200
10
20
50
+25
uNITS
LSB
Ω
DC PERFORMANCE (RESISTOR CHARACTERISTICS)
Terminal Capacitance
Wiper Capacitance
End-to-End Resistor Tempco
End-to-End Resistor
Tolerance
AC PERFORMANCE
10kΩ
-3dB Bandwidth
Total Harmonic Distortion
Plus Noise
Wiper Settling Time
Charge-Pump Feedthrough
at W
POWER SuPPLIES
Supply Voltage Range
Terminal Voltage Range (H,
W, L to GND)
Supply Current (Note 8)
DIgITAL INPuTS
Minimum Input High Voltage
Maximum Input Low Voltage
Input Leakage Current
Input Capacitance
V
IH
V
IL
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
-1
5
70
80
30
20
+1
% x V
DD
% x V
DD
µA
pF
I
VDD
V
DD
Charge pump enabled, 1.7V < V
DD
< 5.5V
Charge pump disabled, 2.6V < V
DD
< 5.5V
Charge pump disabled, 2.6V < V
DD
< 5.5V
V
DD
= 5.5V
Charge pump enabled,
1.7V < V
DD
< 5.5V
V
DD
= 1.7V
1.7
0
0
1
25
20
µA
5.5
5.25
V
DD
V
V
BW
Code = 80h, 10pF load,
V
DD
= 1.8V
(Note 6)
10kΩ
t
S
(Note 7)
50kΩ
100kΩ
V
RW
50kΩ
100kΩ
1600
340
165
0.035
190
400
664
600
nV
RMS
ns
%
kHz
C
H
, C
L
C
W
T
CR
pF
pF
ppm/°C
%
THD+N
Maxim Integrated
3
MAX5394
Single, 256-Tap Volatile, SPI, Low-Voltage Linear
Taper Digital Potentiometer
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 1.7V to 5.5V, V
H
= V
DD
, V
L
= GND, T
A
= -40°C to +125°C, unless otherwise noted. Typical values are at V
DD
= 1.8V,
T
A
= +25°C.) (Note 2)
PARAMETER
SYMBOL
CONDITIONS
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
20
40
8
8
To 1st SCLK falling
edge (FE)
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
8
16
0
0
2.6V < V
DD
< 5.5V
1.7V < V
DD
< 2.6V
12
16
100
20
5
4.5
20
MIN
TYP
MAx
50
25
uNITS
TIMINg CHARACTERISTICS (Note 9)
SCLK Frequency
SCLK Period
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS
Fall to SCLK Fall Setup
Time
CS
Fall to SCLK Fall Hold
Time
CS
Rise to SCLK Fall Hold
Time
CS
Rise to SCLK Fall
SCLK Fall to
CS
Fall
CS
Pulse-Width High
DIN to SCLK Fall Setup Time
DIN to SCLK Fall Hold Time
CS
Pulse-Width High
f
SCLK
t
SCLK
t
CH
t
CL
t
CSS0
t
CSH0
t
CSH1
t
CSA
t
CSF
t
CSPW
t
DS
t
DH
t
CSPW
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Applies to inactive FE preceding 1st FE
Applies to 16th FE
Applies to 16th FE,
aborted sequence
Applies to 16th FE
Note 2:
All devices are production tested at T
A
= +25°C and are guaranteed by design and characterization for T
A
= -40°C to
+125°C.
Note 3:
DNL and INL are measured with the potentiometer configured as a voltage-divider with V
H
= 5.25 (QP enabled) or V
DD
(QP disabled) and V
L
= GND. The wiper terminal is unloaded and measured with an ideal voltmeter.
Note 4:
R-DNL and R-INL are measured with the potentiometer configured as a variable resistor (Figure
1).
H is unconnected and
L = GND.
For charge pump enabled, V
DD
= 1.7V to 5.5V, the wiper terminal is driven with a source current of 400µA for the 10kΩ
configuration, 80µA for the 50kΩ configuration, and 40µA for the 100kΩ configuration.
For charge pump disabled and V
DD
= 5.5V, the wiper terminal is driven with a source current of 400µA for the 10kΩ
configuration, 80µA for the 50kΩ configuration, and 40µA for the 100kΩ configuration.
For charge pump disabled and V
DD
= +2.6V, the wiper terminal is driven with a source current of 200µA for the 10kΩ
configuration, 40µA for the 50kΩ configuration, and 20µA for the 100kΩ configuration.
Note 5:
The wiper resistance is the maximum value measured by injecting the currents given in Note 4 into W with L = GND.
R
W
= (V
W
- V
H
)/I
W
.
Note 6:
Measured at W with H driven with a 1kHz, 0V to V
DD
amplitude tone and V
L
= GND. Wiper at midscale with a 10pF load.
Note 7:
Wiper-settling time is the worst-case 0-to-50% rise time, measured between tap 0 and tap 127. H = V
DD
, L = GND, and
the wiper terminal is loaded with 10pF capacitance to ground.
Note 8:
Digital inputs at V
DD
or GND.
Note 9:
Digital timing is guaranteed by design and characterization, and is not production tested.
Maxim Integrated
4
MAX5394
Single, 256-Tap Volatile, SPI, Low-Voltage Linear
Taper Digital Potentiometer
H
N.C.
W
W
L
L
Figure 1. Voltage-Divider and Variable Resistor Configurations
Logic analyzers are widely used tools in digital design verification and debugging. They can verify the proper functioning of digital circuits and help users identify and troubleshoot faults. They ...[详细]
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