NC7WZ16 — TinyLogic
®
UHS Dual Buffer
December 2010
NC7WZ16
TinyLogic
®
UHS Dual Buffer
Features
Ultra-High Speed: t
PD
2.4ns (Typical) into 50pF at
5V V
CC
High Output Drive: ±24mA at 3V V
CC
Broad V
CC
Operating Range: 1.65V to 5.5V
Matches Performance of LCX when Operated at
3.3V V
CC
Power Down High-Impedance Inputs/Outputs
Over-Voltage Tolerance Inputs Facilitate 5V to 3V
Translation
Proprietary Noise/EMI Reduction Circuitry
Ultra-Small MicroPak™ Packages
Space-Saving SC70 Package
Description
The NC7WZ16 is a dual buffer from Fairchild’s Ultra-
®
High Speed Series of TinyLogic
.
The device is
fabricated with advanced CMOS technology to achieve
ultra-high speed with high output drive while maintaining
low static power dissipation over a very broad V
CC
operating range. The device is specified to operate over
the 1.65V to 5.5V V
CC
range. The inputs and outputs are
high impedance when V
CC
is 0V. Inputs tolerate
voltages up to 7V independent of V
CC
operating voltage.
Ordering Information
Part Number
NC7WZ16P6X
NC7WZ16L6X
NC7WZ16FHX
Top Mark
Z16
C7
C7
Package
6-Lead SC70, EIAJ SC-88a, 1.25mm Wide
6-Lead MicroPak™, 1.00mm Wide
6-Lead, MicroPak2™, 1x1mm Body, .35mm Pitch
Packing Method
3000 Units on Tape & Reel
5000 Units on Tape & Reel
5000 Units on Tape & Reel
© 1999 Fairchild Semiconductor Corporation
NC7WZ16 • Rev. 1.0.4
www.fairchildsemi.com
NC7WZ16 — TinyLogic
®
UHS Dual Buffer
Connection Diagrams
IEEC/IEC
Figure 1. Logic Symbol
Pin Configurations
Figure 2. SC70 (Top View)
Figure 3. MicroPak™ (Top Through View)
Notes:
1. AAA represents Product Code Top Mark (see
ordering code).
2. Orientation of Top Mark determines Pin One location. Read the top product code mark left to right.
Pin One is the lower left pin.
Figure 4. Pin 1 Orientation
Pin Definitions
Pin # SC70
1
2
3
4
5
6
Pin # MicroPak™
1
2
3
4
5
6
Name
A
1
GND
A
2
Y
2
V
CC
Y
1
Input
Description
Ground
Input
Output
Supply Voltage
Output
Function Table
Y= A
Inputs
A
L
H
H = HIGH Logic Level
L = LOW Logic Level
© 1999 Fairchild Semiconductor Corporation
NC7WZ16 • Rev. 1.0.4
Output
Y
L
H
www.fairchildsemi.com
2
NC7WZ16 — TinyLogic
®
UHS Dual Buffer
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
or I
GND
T
STG
T
J
T
L
P
D
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
Parameter
Min.
-0.5
-0.5
-0.5
Max.
7.0
7.0
7.0
-50
-50
±50
±100
Unit
V
V
V
mA
mA
mA
mA
°C
°C
°C
mW
V
IN
< 0V
V
OUT
< 0V
DC Output Source / Sink Current
DC V
CC
or Ground Current
Storage Temperature Range
Junction Temperature Under Bias
Junction Lead Temperature (Soldering, 10 Seconds)
SC70-6
Power Dissipation
MicroPak™-6
MicroPak2™-6
-65
+150
+150
+260
180
130
120
4000
2000
ESD
Human Body Model, JEDEC:JESD22-A114
Charge Device Model, JEDEC:JESD22-C101
V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V
CC
V
IN
V
OUT
t
r
,t
f
T
A
θ
JA
Parameter
Supply Voltage Operating
Supply Voltage Data Retention
Input Voltage
Output Voltage
Conditions
Min.
1.65
1.50
0
0
Max.
5.50
5.50
5.5
V
CC
20
10
5
+125
425
500
560
Unit
V
V
V
ns/V
°C
°C/W
V
CC
=1.8V, 2.5V ±0.2V
Input Rise and Fall Times
Operating Temperature
SC70-6
Thermal Resistance
MicroPak™-6
MicroPak2™-6
Note:
3. Unused inputs must be held HIGH or LOW. They may not float.
V
CC
=3.3V ±0.3V
V
CC
=5.5V ±0.5V
0
0
0
-40
© 1999 Fairchild Semiconductor Corporation
NC7WZ16 • Rev. 1.0.4
www.fairchildsemi.com
3
NC7WZ16 — TinyLogic
®
UHS Dual Buffer
DC Electrical Characteristics
Symbol
Parameter
HIGH Level Control
Input Voltage
LOW Level Control
Input Voltage
V
CC
(V)
1.65 to 1.95
2.3 to 5.5
1.65 to 1.95
2.3 to 5.5
1.65
1.80
2.30
3.00
Conditions
Min.
T
A
=25°C
Typ.
Max.
T
A
=-40 to +85°C
Min.
0.75V
CC
0.70 V
CC
0.25V
CC
0.30V
CC
0.25V
CC
0.30V
CC
1.55
1.70
2.20
2.90
4.40
1.21
1.90
2.40
2.30
3.80
0.10
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
±0.1
1.0
1.0
0.10
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
±1.0
10
10
Units
Max.
V
V
IH
V
IL
0.75V
CC
0.70V
CC
V
1.55
1.70
I
OH
=-100µA
2.20
2.90
V
IN
=V
IH
4.40
I
OH
=-4mA
I
OH
=-8mA
I
OH
=-16mA
I
OH
=-24mA
I
OH
=-32mA
1.29
1.90
2.40
2.30
3.80
1.65
1.80
2.30
3.00
4.50
1.52
2.14
2.75
2.62
4.13
0.00
0.00
V
OH
HIGH Level Output
Voltage
4.50
1.65
2.30
3.00
3.00
4.50
1.65
1.80
2.30
3.00
V
I
OL
=100µA
0.00
0.00
V
OL
LOW Level Output
Voltage
4.50
1.65
2.30
3.00
3.00
4.50
V
IN
=V
IL
0.00
I
OL
=4mA
I
OL
=8mA
I
OL
=16mA
I
OL
=24mA
I
OL
=32mA
0.08
0.10
0.16
0.24
0.25
V
I
IN
I
OFF
I
CC
Input Leakage
Current
Power Off Leakage
Current
Quiescent Supply
Current
0 to 5.5
0
1.65 to 5.50
0
≥
V
IN
≥
5.5V
V
IN
or V
OUT
=5.5V
V
IN
=5.5V, GND
µA
µA
µA
© 1999 Fairchild Semiconductor Corporation
NC7WZ16 • Rev. 1.0.4
www.fairchildsemi.com
4
NC7WZ16 — TinyLogic
®
UHS Dual Buffer
AC Electrical Characteristics
Symbol
Parameter
V
CC
(V)
1.65
1.80
2.50 ± 0.20
t
PLH
, t
PHL
Propagation Delay
3.30 ± 0.30
5.00 ± 0.50
3.30 ± 0.30
5.00 ± 0.50
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(4)
0.00
3.30
5.00
C
L
=50pF,
R
L
=500Ω
C
L
=15pF,
R
L
=1MΩ
Conditions
Min.
1.8
1.8
1.0
0.8
0.5
1.2
0.8
T
A
=25°C
Typ. Max.
5.5
4.6
3.0
2.3
1.8
3.0
2.4
2.5
10
12
9.6
8.0
5.2
3.6
2.9
4.6
3.8
T
A
=-40 to +85°C
Min.
1.8
1.8
1.0
0.8
0.5
1.2
0.8
Units
Figure
Max.
10.6
8.8
5.8
4.0
3.2
5.1
4.2
pF
pF
Figure 7
Figure 5
Figure 6
ns
Figure 5
Figure 6
Note:
4. C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
current consumption (I
CCD
) at no output loading and operating at 50% duty cycle. C
PD
is related to I
CCD
dynamic
operating current by the expression: I
CCD
=(C
PD
)(V
CC
)(f
IN
)+(I
CC
static).
Note:
5. CL includes load and stray capacitance;
Input PRR=1.0MHz; t
W
=500ns
Figure 5. AC Test Circuit
Figure 6. AC Waveforms
Note:
6. Input=AC Waveform; t
r
=t
f
=1.8ns; PRR=10 MHz Duty Cycle=50%.
Figure 7. I
CCD
Test Circuit
© 1999 Fairchild Semiconductor Corporation
NC7WZ16 • Rev. 1.0.4
www.fairchildsemi.com
5
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