NC7SZ32 — TinyLogic
®
UHS Two-Input OR Gate
September 2009
NC7SZ32
TinyLogic
®
UHS Two-Input OR Gate
Features
Ultra-High Speed: t
PD
2.4ns (Typical) into 50pF at
5V V
CC
High Output Drive: ±24mA at 3V V
CC
Broad V
CC
Operating Range: 1.65V to 5.5V
Matches Performance of LCX Operated at 3.3V V
CC
Power Down High-Impedance Inputs/Outputs
Over-Voltage Tolerance inputs facilitate 5V to 3V
Translation
Proprietary Noise/EMI Reduction Circuitry
Ultra-Small MicroPak™ Packages
Space-Saving SOT23 and SC70 Packages
Description
The NC7SZ32 is a single two-input OR gate from
Fairchild’s Ultra-High Speed (UHS) series of
®
TinyLogic . The device is fabricated with advanced
CMOS technology to achieve ultra-high speed with high
output drive while maintaining low static power
dissipation over a broad V
CC
operating range. The
device is specified to operate over the 1.65V to 5.5V
V
CC
operating range. The inputs and output are high
impedance when V
CC
is 0V. Inputs tolerate voltages up
to 6V, independent of V
CC
operating voltage.
Ordering Information
Part Number
NC7SZ32M5X
NC7SZ32P5X
NC7SZ32L6X
NC7SZ32FHX
Top Mark
7Z32
Z32
HH
HH
Eco Status
RoHS
RoHS
RoHS
Green
Package
5-Lead SOT23, JEDEC MO-178 1.6mm
5-Lead SC70, EIAJ SC-88a, 1.25mm Wide
6-Lead MicroPak™, 1.00mm Wide
6-Lead, MicroPak2, 1x1mm Body, .35mm
Pitch
Packing Method
3000 Units on
Tape & Reel
3000 Units on
Tape & Reel
5000 Units on
Tape & Reel
5000 Units on
Tape & Reel
For Fairchild’s definition of Eco Status, please visit:
http://www.fairchildsemi.com/company/green/rohs_green.html.
© 1996 Fairchild Semiconductor Corporation
NC7SZ32 • Rev. 1.0.3
www.fairchildsemi.com
NC7SZ32 — TinyLogic
®
UHS Two-Input OR Gate
Connection Diagrams
IEEE/IEC
Figure 1. Logic Symbol
Pin Configurations
Figure 2. SC70 and SOT23 (Top View)
Figure 3. MicroPak (Top Through View)
Pin Definitions
Pin # SC70 / SOT23
1
2
3
4
5
Pin # MicroPak
1
2
3
4
6
5
Name
A
B
GND
Y
V
CC
NC
Input
Input
Description
Ground
Output
Supply Voltage
No Connect
Function Table
Y=A + B
Inputs
A
L
L
H
H
H = HIGH Logic Level
L = LOW Logic Level
Output
B
L
H
L
H
Y
L
H
H
H
© 1996 Fairchild Semiconductor Corporation
NC7SZ32 • Rev. 1.0.3
www.fairchildsemi.com
2
NC7SZ32 — TinyLogic
®
UHS Two-Input OR Gate
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device
reliability. The absolute maximum ratings are stress ratings only.
Symbol
V
CC
V
IN
V
OUT
I
IK
I
OK
I
OUT
I
CC
or I
GND
T
STG
T
J
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Parameter
Min.
-0.5
-0.5
-0.5
Max.
6.0
6.0
6.0
-50
+20
-50
+20
±50
±50
Unit
V
V
V
mA
mA
mA
mA
°C
°C
°C
V
IN
< -0.5V
V
IN
> 6.0V
V
OUT
< -0.5V
V
OUT
> 6V, V
CC
=GND
DC V
CC
or Ground Current
Storage Temperature Range
Junction Temperature Under Bias
Junction Lead Temperature (Soldering, 10 Seconds)
SOT-23
SC70-5
MicroPak-6
MicroPak2-6
-65
+150
+150
+260
200
150
130
120
4000
2000
P
D
Power Dissipation at +85°C
mW
ESD
Human Body Model, JEDEC:JESD22-A114
Charge Device Model: JEDEC:JESD22-C101
V
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to Absolute Maximum Ratings.
Symbol
V
CC
V
IN
V
OUT
T
A
t
r
, t
f
Parameter
Supply Voltage Operating
Supply Voltage Data Retention
Input Voltage
Output Voltage
Operating Temperature
Conditions
Min.
1.65
1.50
0
0
-40
Max.
5.50
5.50
5.5
V
CC
+85
20
10
5
300
425
500
560
Unit
V
V
V
°C
ns/V
V
CC
=1.8V, 2.5V ± 0.2V
Input Rise and Fall Times
V
CC
=3.3V ± 0.3V
V
CC
=5.0V ± 0.5V
SOT-23
θ
JA
Thermal Resistance
SC70-5
MicroPak-6
MicroPak2-6
Note:
1. Unused inputs must be held HIGH or LOW. They may not float.
© 1996 Fairchild Semiconductor Corporation
NC7SZ32 • Rev. 1.0.3
0
0
0
°C/W
www.fairchildsemi.com
3
NC7SZ32 — TinyLogic
®
UHS Two-Input OR Gate
DC Electrical Characteristics
Symbol
Parameter
HIGH Level Input
Voltage
LOW Level Input
Voltage
V
CC
1.65 to 1.95
2.30 to 5.50
1.65 to 1.95
2.30 to 5.50
1.65
1.80
2.30
3.00
Conditions
Min.
T
A
=+25°C
Typ.
Max.
T
A
=-40 to +85°C
Min.
0.75V
CC
0.70V
CC
Units
Max.
V
0.25V
CC
0.30V
CC
V
IH
V
IL
0.75V
CC
0.70V
CC
0.25V
CC
0.30V
CC
1.55
1.70
V
IN
=V
IH
, I
OH
=-100µA
2.20
2.90
4.40
I
OH
=-4mA
I
OH
=-8mA
I
OH
=-16mA
I
OH
=-24mA
I
OH
=-32mA
1.29
1.90
2.40
2.30
3.80
1.65
1.80
2.30
3.00
4.50
1.52
2.15
2.80
2.68
4.20
0.00
0.00
V
IN
=V
IL
, I
OL
=100µA
0.00
0.00
0.00
I
OL
=4mA
I
OL
=8mA
I
OL
=16mA
I
OL
=24mA
I
OL
=32mA
V
IN
=5.5V, GND
V
IN
or V
OUT
=5.5V
0.80
0.10
0.15
0.22
0.22
0.10
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
±1
1
2.0
V
1.55
1.70
2.20
2.90
4.40
1.29
1.90
2.40
2.30
3.80
0.10
0.10
0.10
0.10
0.10
0.24
0.30
0.40
0.55
0.55
±10
10
20
µA
µA
µA
V
V
V
OH
HIGH Level
Output Voltage
4.50
1.65
2.30
3.00
3.00
4.50
1.65
1.80
2.30
3.00
V
OL
LOW Level
Output Voltage
4.50
1.65
2.30
3.00
3.00
4.50
I
IN
I
OFF
I
CC
Input Leakage
Current
Power Off
Leakage Current
Quiescent Supply
Current
0 to 5.5
0
1.65 to 5.50 V
IN
=5.5V, GND
© 1996 Fairchild Semiconductor Corporation
NC7SZ32 • Rev. 1.0.3
www.fairchildsemi.com
4
NC7SZ32 — TinyLogic
®
UHS Two-Input OR Gate
AC Electrical Characteristics
Symbol
Parameter
V
CC
1.65
1.80
t
PLH
, t
PHL
Propagation Delay
Conditions
Min.
2.0
2.0
C
L
=15pF,
0.8
0.5
0.5
1.5
0.8
T
A
=25°C
Typ.
5.5
4.6
3.0
2.4
1.9
3.0
2.4
4
20
26
T
A
=-40 to +85°C
Max.
12.0
10.0
7.0
4.7
4.1
5.2
4.5
Units
Figure
Min.
2.0
2.0
0.8
0.5
0.5
1.5
0.8
Max.
12.7
10.5
7.5
5.0
4.4
5.5
4.8
pF
pF
Figure 6
ns
Figure 4
Figure 5
2.50 ± 0.30
R =1MΩ
L
3.30 ± 0.30
5.00 ± 0.50
3.30 ± 0.30
C
L
=50pF,
5.00 ± 0.50
R
L
=500Ω
C
IN
C
PD
Input Capacitance
Power Dissipation
Capacitance
(2)
0.00
3.30
5.00
Note:
2. C
PD
is defined as the value of the internal equivalent capacitance which is derived from dynamic operating
current consumption (I
CCD
) at no output loading and operating at 50% duty cycle. C
PD
is related to I
CCD
dynamic
operating current by the expression: I
CCD
=(C
PD
)(V
CC
)(f
IN
)+(I
CC
static).
Note:
3. C
L
includes load and stray capacitance.
Input PRR=10MHz t
w
=500ns.
Figure 4. AC Test Circuit
Figure 5. AC Waveforms
Note:
4. Input=AC Waveform; t
r
=t
f
=1.8ns;
PRR=10MHz; Duty Cycle=50%
Figure 6. I
CCD
Test Circuit
© 1996 Fairchild Semiconductor Corporation
NC7SZ32 • Rev. 1.0.3
www.fairchildsemi.com
5
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