DA6283.002
11 November, 2010
MAS6283
IC FOR 1.5625 MHz – 40.0000 MHz VCXO
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DESCRIPTION
MAS6283 is an integrated circuit well suited to
build a VCXO for telecommunication and other
applications. To build a VCXO only one additional
component, a crystal, is needed.
Low Power
Wide Supply Range
CMOS (Square Wave) Output
Very Low Phase Noise
Low Cost
Divider Function
Tri State output
FEATURES
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Very small size
Low current consumption
Wide operating temperature range
Phase noise < -130 dBc/Hz at 1 kHz offset
CMOS (Square wave) output
APPLICATIONS
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VCXO modules
VCXO for telecommunications systems
VCXO for set-top boxes
VCXO for MPEG decoder
BLOCK DIAGRAM
PD
VC
1/2
1/2
1/2
1/2
OUT
VDD
MAS6283
1 nF
VSS
XIN
XOUT
Figure 1. Block diagram of MAS6283.
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DA6283.002
11 November, 2010
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply Voltage
Input Pin Voltage
Power Dissipation (max)
Storage Temperature
Latchup Current Limit
Symbol
V
DD
- V
SS
P
MAX
T
ST
I
LUT
Conditions
Min
-0.3
V
SS
-0.3
-55
±100
Max
6.0
V
DD
+ 0.3
100
150
Unit
V
V
mW
o
C
mA
Note
1)
Note:
Stresses beyond the values listed may cause a permanent damage to the device. The device may not
operate under these conditions, but it will not be destroyed
Note:
This is a CMOS device and therefore it should be handled carefully to avoid any damage by static
voltages (ESD).
Note 1:
Not valid for pins XIN and XOUT.
RECOMMENDED OPERATION CONDITIONS
Parameter
Supply Voltage
Operating Temperature
Crystal R
S
Symbol
V
DD
T
OP
R
S
Conditions
Min
2.5
-40
Typ
3.3
30
Max
5.5
+85
60
Unit
V
o
C
Note
1)
2)
Note 1:
It is recommended to connect a 1 nF SMD capacitor between the VDD and VSS pins. Assure that
rd
capacitor resonance frequency is high enough to filter 3 harmonic.
Note 2:
See figure 5 for negative resistance at different frequencies.
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DA6283.002
11 November, 2010
ELECTRICAL CHARACTERISTICS
Parameter
Crystal Frequency Range
Output Frequency Range
Output Frequency Range
Voltage Control Range
Voltage Control impedance
Supply Current
V
DD
= 3.3V, f
c
= 35 MHz
Supply Current
V
DD
= 5.0V, f
c
= 35 MHz
Supply Current XPD = 0 V
Output Symmetry
Startup Time
Output Buffer
Enabled
Disabled
Crystal Load Capacitance
Pulling Range
0.0V < V
C
< 5.0V
T
START
XPD
1.6
0
C
L
V
C
= 1.65 V
Crystal S=
30 ppm/pF
8
285
V
DD
0.55
V
pF
ppm
4)
5)
6)
Symbol
f
c
f
o
f
o
V
C
Z
VC
I
DD
No Load
C
LOUT =
10 pF
C
LOUT =
30 pF
C
LOUT =
50 pF
No Load
C
LOUT =
10 pF
C
LOUT =
30 pF
C
LOUT =
50 pF
V
DD
= 3.3 V
V
DD
= 5.0 V
45
Conditions
Min
25
25
1.5625
0
1.2
2.0
9.3
23.8
38.3
3.0
14.0
36.0
58.0
1.5
1.7
55
Typ
Max
40
40
20
V
DD
Unit
MHz
MHz
MHz
V
M
mA
Note
1)
2)
3)
I
DD
mA
I
XPD
0.9
0.9
48-52
2
mA
%
ms
Note 1:
Crystal frequency can be divided by 2, 4, 8 and 16.
Note 2:
Direct output.
Note 3:
Depending on chosen output divider.
Note 4:
If the XPD pin is floating the output buffer is active. Oscillator is always running. At power down mode
the output is at high impedance.
Note 5:
Crystal load capacitance is dependent on a V
C
voltage. See figure 4 for C
L
for other V
C
voltages.
Note 6:
For calculating crystal pulling (S), see equation 1 on the page 5.
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DA6283.002
11 November, 2010
PIN DESCRIPTION
Pin Description
Crystal Oscillator Output
Voltage Control Input
Power Supply Ground
Buffer Output
Power Supply Voltage
Output Buffer Power Down Control
Crystal/Varactor Oscillator Input
Symbol
XOUT
VC
VSS
OUT
VDD
XPD
XIN
x-coordinate
214
885
1080
1106
579
339
153
y-coordinate
141
142
141
699
698
698
698
Note:
Because the substrate of the die is internally connected to VSS, the die has to be connected to VSS or left
floating. Please make sure that VSS is the first pad to be bonded. Pick-and-place and all component assembly
are recommended to be performed in ESD protected area.
Note:
Pad coordinates are measured from the left bottom corner of the chip to the center of the pads. The
coordinates may vary depending on sawing width and location. However, the distances between pads are
accurate.
IC OUTLINES
XIN
XPD
VDD
OUT
840 um
XOUT
VC
MAS6283
VSS
Die Map Reference
1260 um
Figure 2. IC outline of MAS6283.
Note1:
Die map reference is the actual left bottom corner of the sawn chip.
Note2:
See coordinates in pin description.
Note3:
Die dimensions include 80
µm
scribes for both sides. The actual dimensions are a bit less due to the saw
width.
4/13
DA6283.002
11 November, 2010
EXTERNAL COMPONENT SELECTION
Quartz Crystal and VCXO Module Information
To ensure the best system performance, the crystal
parameters should be considered carefully. Pulling
is an important parameter which can be calculated
according to an equation 1. Layout guidelines in the
following section should be followed. The frequency
of the crystal is tuned by load capacitors. There are
integrated variable load capacitors on the MAS6283
and they are controlled by an external voltage at the
VC pin. It is recommended to connect a 1 nF
capacitor between VDD and VSS
.
The external
crystal should be located as close to the chip as
possible. In case of a PCB mounted module, it is
usually advisable to mount a crystal on the same
side with the VCXO IC to minimize stray
capacitance. Often vias between the crystal pins
and the XIN and XOUT pins of the VCXO IC
increase stray capacitance. There should be no
noisy signal traces underneath or close to the
crystal.
Equation 1
Crystal Pulling Sensitivity
S
=−
C
1
ppm
[values are given in the units described below]
2(
C
0
+
C
L
)
2
pF
10
6
Where,
C
L
= Load capacitance in series with the crystal
C
0
= Shunt capacitance of the crystal
C
1
= Motional capacitance of the crystal
Example 1
If we choose a crystal with the following values
C
L
= 8.0 pF,
C
0
= 2.0 pF,
C
1
= 6.7 fF
the equation 1 yields
S
=
−
6.7
×
10
−
15
2 2.0
×
10
−
12
+
8.0
×
10
−
12
10
6
(
)
2
= −
33.5
ppm
pF
If a crystal load differs from 8 pF the oscillator will have frequency offset at V
C
= 1.65 V. Thus if you need to use
1.65 V VC voltage with a crystal which C
L
is other than 8 pF you have to design the crystal for a specific nominal
frequency. The following guidelines show how to define the crystal’s nominal frequency.
Separate crystal C
L
as C
L_XTAL
and MAS IC C
L
as C
L_IC
.
To define specific nominal frequency for the crystal first calculate load difference
∆C
L
[pF] as in an equation 2.
Equation 2
∆
C
L
=
C
L
_
IC
−
C
L
_
XTAL
Calculate frequency difference
∆f
[ppm] as in an equation 3. Pulling S comes from the equation 1.
Equation 3
∆
f
= ∆
C
L
×
S
5/13
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