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EVALUATION KIT AVAILABLE

MAX11166

16-Bit, 500ksps, ±5V SAR ADC with

Internal Reference in TDFN

Benefits and Features

● High DC/AC Accuracy Improves Measurement

Quality

• 16-Bit Resolution with No Missing Codes

• 500ksps Throughput Rates Without Pipeline Delay/

Latency

• 92.9dB SNR and -103dB THD at 10kHz

• 0.5 LSB

RMS

Transition Noise

• ±0.2 LSB DNL (typ) and ±0.4 LSB INL (typ)

● Highly Integrated ADC Saves Cost and Space

• ±6ppm/°C Internal Reference

• Internal Reference Buffer

• ±5V Bipolar Analog Input Range

● Wide Supply Range and Low Power Simplify Power-

Supply Design

• 5V Analog Supply

• 2.3V to 5V Digital Supply

• 25.5mW Power Consumption at 500ksps

• 10μA in Shutdown Mode

● Multi-Industry Standard Serial Interface and Small

Package Reduce Size

• SPI/QSPI™/MICROWIRE®/DSP-Compatible

Serial Interface

• 3mm x 3mm Tiny 12-Pin TDFN Package

QSPI is a trademark of Motorola, Inc.

MICROWIRE is a registered trademark of National

Semiconductor Corporation.

Selector Guide

and

Ordering Information

appear at end of

data sheet.

V

OVDD

(2.3V TO 5V)

1µF

General Description

The MAX11166 16-bit, 500ksps, SAR ADC offers excel-

lent AC and DC performance with true bipolar input range,

small size, and internal reference. The MAX11166 mea-

sures a

Q5V

(10V

P-P

) input range while operating from

a single 5V supply. A patented charge-pump architecture

allows direct sampling of high-impedance sources. The

MAX11166 integrates an optional internal reference and

buffer, saving additional cost and space.

This ADC achieves 92.9dB SNR and -103dB THD. The

MAX11166 guarantees 16-bit no-missing codes and

Q0.4

LSB INL (typ).

The MAX11166 communicates using an SPI-compatible

serial interface at 2.5V, 3V, 3.3V, or 5V logic. The serial

interface can be used to daisy-chain multiple ADCs in

parallel for multichannel applications and provides a busy

indicator option for simplified system synchronization and

timing.

The MAX11166 is offered in a 12-pin, 3mm x 3mm, TDFN

package and is specified over the -40NC to +85NC tem-

perature range.

Applications

● Data Acquisition Systems

● Industrial Control Systems/Process Control

● Medical Instrumentation

● Automatic Test Equipment

Typical Operating Circuit

V

DD

(5V)

1µF

14-Bit to 18-Bit SAR ADC Family

14-BIT

500ksps

HOST

µC

16-BIT

250ksps

MAX11167

MAX11169

MAX11161

MAX11165

MAX11163

16-BIT

500ksps

18-BIT

500ksps

±5V

MAX9632

10Ω

AIN+

AIN-

16-BIT ADC

INTERFACE

AND

CONTROL

SCLK

DIN

DOUT

CNVST

4.7nF

REF

10µF

MAX11166

REF

BUF

AGNDS

INTERNAL

REFERENCE

GND

±5V

Input

Internal

Reference

0 to 5V Input

Internal

Reference

0 to 5V Input

External

Reference

—

MAX11166 MAX11156

MAX11168 MAX11158

MAX11160 MAX11150

MAX11164 MAX11154

MAX11162 MAX11152

REFIO

0.1µF

MAX11262

19-7673; Rev 0; 7/15

MAX11166

16-Bit, 500ksps, ±5V SAR ADC

with Internal Reference in TDFN

Absolute Maximum Ratings

V

DD

to GND ............................................................-0.3V to +6V

OVDD to GND ....... -0.3V to the lower of (V

DD

+ 0.3V) and +6V

AIN+ to GND ........................................................................

Q7V

AIN-, REF, REFIO, AGNDS

to GND............... -0.3V to the lower of (V

DD

+ 0.3V) and +6V

SCLK, DIN, DOUT, CNVST

to GND............... -0.3V to the lower of (V

DD

+ 0.3V) and +6V

Maximum Current into Any Pin...........................................50mA

Continuous Power Dissipation (T

A

= +70NC)

TDFN (derate 18.2mW/NC above +70NC) ..................1349mW

Operating Temperature Range ........................... -40NC to +85NC

Junction Temperature ......................................................+150NC

Storage Temperature Range ............................ -65NC to +150NC

Lead Temperature (soldering, 10s) ................................. +300NC

Soldering Temperature (reflow) .......................................+260NC

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation

of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect device reliability.

Package Thermal Characteristics

(Note 1)

TDFN

Junction-to-Ambient Thermal Resistance (q

JA

).......59.3NC/W

Junction-to-Case Thermal Resistance (q

JC

) ...........22.5NC/W

Note 1:

Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer

board. For detailed information on package thermal considerations, refer to

www.maximintegrated.com/thermal-tutorial.

Electrical Characteristics

(V

DD

= 4.75V to 5.25V, V

OVDD

= 2.3V to 5.25V, f

SAMPLE

= 500ksps, V

REF

= 4.096V; Reference Mode 3, T

A

= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25NC.) (Note 2)

PARAMETER

ANALOG INPUT (Note 3)

Input Voltage Range

AIN+ to AIN-, K =

AIN+ to GND

AIN- to GND

Input Leakage Current

Input Capacitance

Input-Clamp Protection Current

DC ACCURACY (Note 4)

Resolution

No Missing Codes

Offset Error

Offset Temperature Coefficient

Gain Error

Gain Error Temperature

Coefficient

Integral Nonlinearity

Differential Nonlinearity

Positive Full-Scale Error

INL

DNL

T

A

= T

MIN

to T

MAX

Guaranteed by design

-1.2

-0.5

-8

-4.3

N

16

-7.5

±0.8

±0.006

±1.2

±0.015

±0.4

±0.2

+1.2

+0.5

+8

+4.3

+7.5

Bits

LSB

LSB/°C

LSB

LSB/°C

LSB

Both inputs

-20

Acquisition phase

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

5.000

4.096

-K x V

REF

-(V

DD

+

0.1)

-0.1

-10

+K x V

REF

+(V

DD

+

0.1)

+0.1

V

Absolute Input Voltage Range

V

µA

pF

mA

+0.001

16

+10

+20

www.maximintegrated.com

Maxim Integrated │ 2

MAX11166

16-Bit, 500ksps, ±5V SAR ADC

with Internal Reference in TDFN

Electrical Characteristics (continued)

(V

DD

= 4.75V to 5.25V, V

OVDD

= 2.3V to 5.25V, f

SAMPLE

= 500ksps, V

REF

= 4.096V; Reference Mode 3, T

A

= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25NC.) (Note 2)

PARAMETER

Negative Full-Scale Error

Analog Input CMRR

Power-Supply Rejection (Note 5)

Transition Noise

REFERENCE (Note 7)

REF Output Initial Accuracy

REF Output Temperature

Coefficient

REFIO Output Initial Accuracy

REFIO Output Temperature

Coefficient

REFIO Output Impedance

REFIO Input Voltage Range

Reference Buffer Initial Offset

Reference Buffer Temperature

Coefficient

External Compensation Capacitor

REF Voltage Input Range

REF Input Capacitance

REF Load Current

AC ACCURACY (Note 6)

VREF = 4.096V, reference

mode 3

Signal-to-Noise Ratio (Note 7)

SNR

fIN = 10kHz

VREF = 4.096V, reference

mode 1

VREF = 2.5V, reference

mode 3

Internal reference,

reference mode 0

VREF = 4.096V, reference

mode 3

Signal-to-Noise Plus Distortion

(Note 7)

SINAD

fIN = 10kHz

VREF = 4.096V, reference

mode 1

VREF = 2.5V, reference

mode 3

Internal reference,

reference mode 0

Spurious-Free Dynamic Range

Total Harmonic Distortion

Intermodulation Distortion (Note 8)

SFDR

THD

IMD

99.0

91.1

91.8

92.9

92.8

dB

89.8

92.9

92.1

dB

89.3

92.3

-104.3

-103.0

-119.7

-97.5

dB

I

REF

C

EXT

V

REF

V

REF

TC

REF

V

REFIO

TC

REFIO

Reference mode 0

Reference modes 0 and 2

Reference mode 1

Reference modes 0 and 1

Required for reference modes 0 and 1,

recommended for reference modes 2 and 3

Reference modes 2 and 3

V

REF

= 4.096V, reference modes 2 and 3

10

2.5

20

146

4.25

3.00

-500

±6

4.092

4.096

±7.5

4.096

±6

10

4.096

4.25

+500

±10

4.100

±17

4.100

±15

V

ppm/°C

V

ppm/°C

kΩ

V

µV

µV/°C

µF

V

pF

µA

CMRR

PSR

SYMBOL

CONDITIONS

MIN

-8

-1.1

-4.5

0.5

TYP

MAX

+8

UNITS

LSB

LSB/V

LSB

RMS

www.maximintegrated.com

Maxim Integrated │ 3

MAX11166

16-Bit, 500ksps, ±5V SAR ADC

with Internal Reference in TDFN

Electrical Characteristics (continued)

(V

DD

= 4.75V to 5.25V, V

OVDD

= 2.3V to 5.25V, f

SAMPLE

= 500ksps, V

REF

= 4.096V; Reference Mode 3, T

A

= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25NC.) (Note 2)

PARAMETER

SAMPLING DYNAMICS

Throughput Sample Rate

Transient Response

Full-Power Bandwidth

Aperture Delay

Aperture Jitter

POWER SUPPLIES

Analog Supply Voltage

Interface Supply Voltage

Analog Supply Current

V

DD

Shutdown Current

Interface Supply Current

OVDD Shutdown Current

V

DD

= 5V, V

OVDD

= 3.3V,

reference mode = 2, 3

V

DD

= 5V, V

OVDD

= 3.3V,

reference mode = 0, 1

0.7 x

V

OVDD

0.3 x V

OVDD

±0.05 x V

OVDD

10

V

IN

= 0V or V

OVDD

I

SOURCE

= 2mA

I

SINK

= 2mA

-10

15

-10

V

OVDD

- 0.4

0.4

+10

I

OVDD

V

OVDD

= 2.3V

V

OVDD

= 5.25V

V

DD

V

OVDD

I

VDD

Reference mode = 0, 1

Reference mode = 2, 3

4.75

2.3

5.0

3.0

6.0

3.5

6.1

1.5

4.3

0.9

25.5

mW

37.5

5.25

7.0

4.0

10

2.0

5.0

10

V

mA

µA

mA

µA

Full-scale step

-3dB point

-0.1dB point

6

> 0.2

2.5

< 50

0.01

500

400

ksps

ns

MHz

ns

ps

RMS

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

Power Dissipation

DIGITAL INPUTS (DIN, SCLK, CNVST)

Input Voltage High

Input Voltage Low

Input Hysteresis

Input Capacitance

Input Current

DIGITAL OUTPUT (DOUT)

Output Voltage High

Output Voltage Low

Three-State Leakage Current

Three-State Output Capacitance

V

OH

V

OL

V

µA

pF

V

IH

V

IL

V

HYS

C

IN

I

IN

V

pF

µA

www.maximintegrated.com

Maxim Integrated │ 4

MAX11166

16-Bit, 500ksps, ±5V SAR ADC

with Internal Reference in TDFN

Electrical Characteristics (continued)

(V

DD

= 4.75V to 5.25V, V

OVDD

= 2.3V to 5.25V, f

SAMPLE

= 500ksps, V

REF

= 4.096V; Reference Mode 3, T

A

= T

MIN

to T

MAX

, unless

otherwise noted. Typical values are at T

A

= +25NC.) (Note 2)

PARAMETER

TIMING (Note 9)

Time Between Conversions

Conversion Time

Acquisition Time

CNVST Pulse Width

SCLK Period (CS Mode)

t

CYC

t

CONV

t

ACQ

t

CNVPW

t

SCLK

CNVST rising to data available

t

ACQ

= t

CYC

- t

CONV

CS

mode

V

OVDD

> 4.5V

V

OVDD

> 2.7V

V

OVDD

> 2.3V

V

OVDD

> 4.5V

SCLK Period (Daisy-Chain Mode)

SCLK Low Time

SCLK High Time

SCLK Falling Edge to Data Valid

Delay

CNVST Low to DOUT D15 MSB

Valid (CS Mode)

CNVST High or Last SCLK

Falling Edge to DOUT High

Impedance

DIN Valid Setup Time from SCLK

Falling Edge

DIN Valid Hold Time from SCLK

Falling Edge

SCLK Valid Setup Time to

CNVST Falling Edge

SCLK Valid Hold Time to CNVST

Falling Edge

t

SCLK

t

SCLKL

t

SCLKH

V

OVDD

> 4.5V

t

DDO

V

OVDD

> 2.7V

V

OVDD

> 2.3V

t

EN

t

DIS

V

OVDD

> 2.7V

V

OVDD

< 2.7V

CS

Mode

V

OVDD

> 4.5V

t

SDINSCK

V

OVDD

> 2.7V

V

OVDD

> 2.3V

t

HDINSCK

t

SSCKCNF

t

HSCKCNF

3

5

6

0

3

6

ns

V

OVDD

> 2.7V

V

OVDD

> 2.3V

2

1.35

0.5

5

14

20

26

16

24

30

5

12

18

23

14

17

20

ns

100000

1.5

µs

ns

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

ns

Note 2:

Maximum and minimum limits are fully production tested over specified supply voltage range and at a temperature of

+25°C. Limits over the operating temperature range are guaranteed by design and device characterization.

Note 3:

See the

Analog Inputs

and

Overvoltage Input Clamps

sections.

Note 4:

Static Performance limits are guaranteed by design and device characterization. For definitions, see the

Definitions

section.

Note 5:

Defined as the change in positive full-scale code transition caused by a

Q5%

variation in the V

DD

supply voltage.

Note 6:

10kHz sine wave input, -0.1dB below full scale.

Note 7:

See

Table 4

for definition of the reference modes.

Note 8:

f

IN1

~ 9.4kHz, f

IN2

~ 10.7kHz, Each tone at -6.1dB below full scale.

Note 9:

C

LOAD

= 65pF on DOUT.

www.maximintegrated.com

Maxim Integrated │ 5

MAX11167

MAX11167概述

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