AN30185A
VIN = 2.9V to 5.5V 2ch,0.8A
General-purpose High Efficiency Power LSI
FEATURES
High-speed response DC-DC Step-Down Regulator
circuit that employs hysteretic control system :
2-ch (1.0 V, 0.8 A / 1.8 V, 0.8 A)
LDO : 1-ch (0.9 V, 10 mA)
Built-in external Pch MOSFET gate drive circuits
Built-in Reset function
Built-in Under Voltage Lockout function (UVLO)
24pin Plastic Quad Flat Non-leaded Package
(Size : 4
×
4 mm, 0.5 mm pitch)
DESCRIPTION
AN30185A is a power management LSI which has
DC-DC step down regulators (2-ch) that employs
hysteretic control system.
By this system, when load current changes suddenly, it
responds at high speed and minimizes the changes of
output voltage.
Since it is possible to use capacitors with small
capacitance and it is unnecessary to use parts for phase
compensation, this IC realizes downsizing of set and
reducing in the number of external parts.
Output voltages are 1.0 V and 1.8 V. Each maximum
current is 0.8 A.
This LSI has a LDO circuit, external Pch-MOSFET gate
drive circuits and a reset circuit of input power supply
voltage.
APPLICATIONS
High Current Distributed Power Systems such as
SSD (Solid State Drive), Cellular Phone, etc.
SIMPLIFIED APPLICATION
3.3V
3.3V
90
85
80
EFFICIENCY CURVE
[DC-DC1]
10 kΩ
efficiency [%]
75
70
65
60
55
50
PVIN1
4.7
μF
PVIN2
EN
PVIN1
EN2
RESET
PCNT
DIS
FB1
LX1
2.2
μH
VOUT1
10
μF
VOUT2
2.2
μH
1.0
μF
10
μF
VIN=3.3V
VIN=5V
45
40
1
10
load current [mA]
100
1000
PVIN2
4.7
μF
AVIN
AVIN
4.7
μF
AN30185A
FB2
LX2
BUF
Condition : V
IN
=3.3V or 5.0V , Vout=1.0V , Cout=10μF , Lout=2.2μH
VREG AGND1 AGND2 PGND1 PGND2
1.0
μF
[DC-DC2]
100
95
90
85
efficiency [%]
80
75
70
65
60
55
50
1
10
load current [mA]
100
1000
VIN=3.3V
VIN=5V
Notes) This application circuit is an example. The operation
of mass production set is not guaranteed. You should
perform enough evaluation and verification on the
design of mass production set. You are fully
responsible for the incorporation of the above
application circuit and information in the design of your
equipment.
Condition : V
IN
=3.3V or 5.0V , Vout=1.8V , Cout=10μF , Lout=2.2μH
Publication date: October 2012
1
Ver. BEB
AN30185A
ABSOLUTE MAXIMUM RATINGS
Parameter
Supply voltage
Operating free-air temperature
Operating junction temperature
Storage temperature
Input Voltage Range
Output Voltage Range
ESD
Symbol
V
IN
T
opr
T
j
T
stg
EN,EN2,FB1,FB2
LX1,LX2,PCNT,DIS,
RESET,BUF,VREG
HBM (Human Body Model)
Rating
6.0
– 40 to + 85
– 40 to + 150
– 55 to + 150
– 0.3 to (V
IN
+ 0.3)
– 0.3 to (V
IN
+ 0.3)
2
Unit
V
°C
°C
°C
V
V
kV
Notes
*1
*3
*2
*2
*2
*1
*3
*1
*3
-
Notes) Do not apply external currents and voltages to any pin not specifically mentioned.
This product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating.
This rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated
recommended operating range. When subjected under the absolute maximum rating for a long time, the reliability of the product
may be affected.
*1:The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
*2:Except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for Ta = 25°C.
*3:V
IN
is voltage for AVIN, PVIN1 = PVIN2,(V
IN
+ 0.3) V must not be exceeded 6 V.
POWER DISSIPATION RATING
PACKAGE
θ
JA
PD(Ta=25°C)
1.472 W
PD(Ta=85°C)
0.765 W
Notes
*1
9pin Wafer level chip size package
84.9
°C
/W
(WLCSP Type)
Note). For the actual usage, please refer to the PD-Ta characteristics diagram in the package specification, follow the power supply
voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not
exceed the allowable value.
*1:Glass Epoxy Substrate(4 Layers) [Glass-Epoxy: 50 X 50 X 0.8t(mm)]
Die Pad Exposed , Soldered.
CAUTION
Although this has limited built-in ESD protection circuit, but permanent damage may occur on it.
Therefore, proper ESD precautions are recommended to avoid electrostatic damage to the MOS gates
2
Ver. BEB
AN30185A
RECOMMENDED OPERATING CONDITIONS
Parameter
Supply voltage range
Symbol
V
IN
EN
EN2
Input Voltage Range
FB1
FB2
LX1,LX2
PCNT
DIS
Output Voltage Range
RESET
BUF
VREG
– 0.3
– 0.3
– 0.3
—
—
—
– 0.3
– 0.3
– 0.3
– 0.3
– 0.3
—
—
—
—
—
Min.
2.9
– 0.3
– 0.3
Typ.
3.3
—
—
Max.
5.5
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
V
IN
+ 0.3
Unit
V
V
V
V
V
V
V
V
V
V
V
Notes
*1
*2
*3
*3
*3
*3
*3
*3
*3
*3
*3
*3
Note) Do not apply external currents and voltages to any pin not specifically mentioned.
Voltage values, unless otherwise specified, are with respect to GND. GND is voltage for AGND1, AGND2, PGND1, PGND2.
AGND1 = AGND2 = PGND1 = PGND2. Vin is voltage for AVIN, PVIN1, PVIN2. AVIN = PVIN1 = PVIN2.
*1 : Please set the rising time of power input pin to the following range.
In addition, please input the voltage with the rising time which has margin enough in consideration of the variation
in external parts.
*2 : The values under the condition not exceeding the above absolute maximum ratings and the power dissipation.
*3 : (V
IN
+ 0.3) V must not be exceeded 6 V.
0V
100
μs
< Tr < 1.5 ms
(Tr is the rise time from 0 V to the setup voltage of V
IN
.)
3
Ver. BEB
AN30185A
ELECTRICAL CHARACTERISTICS
V
IN
= AVIN = PVIN1 = PVIN2 = 3.3V
[DC-DC1] Cout = 10
μ
F (GRM21BB31A106K[Murata] ) , Lout = 2.2
μ
H ( NR3012T2R2M[Taiyo Yuden] )
[DC-DC2] Cout = 10
μ
F (GRM21BB31A106K[Murata] ) , Lout = 2.2
μ
H ( NR3012T2R2M[Taiyo Yuden] )
T
a
= 25
°C ±
2
°C
unless otherwise noted.
Limits
Parameter
Symbol
Conditions
Min
[DC-DC1] (1.0 V DC/DC step-down regulator)
[DC-DC2] (1.8 V DC/DC step-down regulator)
Consumption current at active
EN pin Low-level input voltage
EN pin High-level input voltage
EN pin leak current
EN2 pin Low-level input voltage
EN2 pin High-level input voltage
EN2 pin leak current
DC-DC1 output voltage
DC-DC2 output voltage
UVLO start voltage
UVLO stop voltage
Reset detection voltage
Reset cancel voltage
Reset ON resistance
DIS discharge resistance
BUF output voltage
IACT
VENL
VENH
ILEAK
EN
VEN2L
EN = 3.3 V,
I
OUT1
, I
OUT2
, I
OUT(BUF)
= 0 A
V
IN
= 3.3 V
V
IN
= 3.3 V
EN = 3.3 V
V
IN
= 3.3 V
—
—
1.5
—
—
1.5
—
0.980
1.764
2.4
2.45
2.740
2.847
—
—
0.873
200
0
3.3
2.4
0
3.3
2.0
1.000
1.800
2.5
2.6
2.810
2.920
10
90
0.900
300
0.3
—
10
0.3
—
10
1.020
1.836
2.6
2.8
2.880
2.993
20
190
0.927
μA
V
V
μA
V
V
μA
V
V
V
V
V
V
Ω
Ω
V
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Typ
Max
Unit
Notes
VEN2H V
IN
= 3.3 V
ILEAK
EN2
DD1
VOUT
DD2
VOUT
EN2 = 3.3 V
I
OUT1
= 450 mA
I
OUT2
= 500 mA
VUVLO
V
IN
= 3.3 V
→
0 V
DET
VUVLO
V
IN
= 0 V
→
3.3 V
RMV
VRST
DET
VRST
RMV
RON
RST
RON
DIS
BUF
VOUT
V
IN
= 3.3 V
→
0 V
V
IN
= 0 V
→
3.3 V
EN = 0 V
EN = 0 V
I
OUT(BUF)
= 10
μA
4
Ver. BEB
AN30185A
ELECTRICAL CHARACTERISTICS
(Continued)
V
IN
= AVIN = PVIN1 = PVIN2 = 3.3V
[DC-DC1] Cout = 10
μ
F (GRM21BB31A106K[Murata] ) , Lout = 2.2
μ
H ( NR3012T2R2M[Taiyo Yuden] )
[DC-DC2] Cout = 10
μ
F (GRM21BB31A106K[Murata] ) , Lout = 2.2
μ
H ( NR3012T2R2M[Taiyo Yuden] )
T
a
= 25
°C ±
2
°C
unless otherwise noted.
Reference values
Parameter
Symbol
Conditions
Min
[DC-DC1] (1.0 V DC/DC step-down regulator)
[DC-DC2] (1.8 V DC/DC step-down regulator)
Consumption current at standby
DC-DC1 line regulation
DC-DC2 line regulation
DC-DC1 load regulation
DC-DC2 load regulation
DC-DC1 output current limit
DC-DC2 output current limit
DC-DC1 efficiency 1
DC-DC1 efficiency 2
DC-DC1 efficiency 3
DC-DC1 efficiency 4
DC-DC2 efficiency 1
DC-DC2 efficiency 2
DC-DC2 efficiency 3
DC-DC2 efficiency 4
DC-DC1 output ripple voltage 1
DC-DC1 output ripple voltage 2
D-CDC2 output ripple voltage 1
DC-DC2 output ripple voltage 2
*1
：Typical
Value checked by design.
Unit
Typ
Max
Notes
ISTB
EN = 0 V
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0
6
8
10
15
1.6
1.6
77
71
80
77
86
80
85
84
30
7
30
7
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
μA
mV
mV
mV
mV
A
A
%
%
%
%
%
%
%
%
mV[p-p]
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
*1
V
IN
= 2.9 V
→
5.5 V
DD1
REGIN I
OUT1
= 450 mA
V
IN
= 2.9 V
→
5.5 V
DD2
REGIN I
OUT2
= 500 mA
DD1
I
= 10
μA →
800 mA
REGLD
OUT1
DD2
I
= 10
μA →
800 mA
REGLD
OUT2
DD1
ILMT
DD2
ILMT
DD1
EFF1
DD1
EFF2
DD1
EFF3
DD1
EFF4
DD2
EFF1
DD2
EFF2
DD2
EFF3
DD2
EFF4
DD1
VRPL1
DD1
VRPL2
DD2
VRPL1
DD2
VRPL2
FB1 = 1.0 V
→
0.5 V
FB2 = 1.8 V
→
0.9 V
V
IN
= 3.3 V
I
OUT1
= 10 mA
V
IN
= 5 V
I
OUT1
= 10 mA
V
IN
= 3.3 V
I
OUT1
= 450 mA
V
IN
= 5 V
I
OUT1
= 450 mA
V
IN
= 3.3 V
I
OUT2
= 10 mA
V
IN
= 5 V
I
OUT2
= 10 mA
V
IN
= 3.3 V
I
OUT2
= 500 mA
V
IN
= 5 V
I
OUT2
= 500 mA
I
OUT1
= 10 mA
I
OUT1
= 450 mA
I
OUT2
= 10 mA
I
OUT2
= 500 mA
mV[p-p]
mV[p-p]
mV[p-p]
5
Ver. BEB
京公网安备 11010802033920号
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved
电子工程世界
