TSH94
HIGH SPEED LOW POWER QUAD
OPERATIONAL AMPLIFIER (WITH
STANDBY
POSITION)
s
2 SEPARATE STANDBY
: REDUCED
s
s
s
s
s
s
s
s
CONSUMPTION
AND
HIGH IMPEDANCE
OUTPUTS
LOW SUPPLY CURRENT : 4.5mA
HIGH SPEED : 150MHz - 110V/µs
UNITY GAIN STABILITY
LOW OFFSET VOLTAGE : 3mV
LOW NOISE 4.2 nV/√Hz
LOW COST
SPECIFIED FOR
600Ω
AND
150Ω
LOADS
HIGH VIDEO PERFORMANCES :
Differential Gain : 0.03%
Differential Phase : 0.07°
Gain Flatness : 6MHz, 0.1dB max. @ 10dB
gain
HIGH AUDIO PERFORMANCES
D
SO16
(Plastic Micropackage)
PIN CONNECTIONS
(top view)
s
DESCRIPTION
The TSH94 is a quad low power high frequency
op-amp, designated for high quality video signal
processing. The device offers an excellent speed
consumption ratio with 4.5mA per amplifier for
150MHz bandwidth.
High slew rate and low noise make it also suitable
for high quality audio applications.
The TSH94 offers 2 separate complementary
STANDBY pins :
u
STANDBY 1 acting on the n° 2 operator
u
STANDBY 2 acting on the n° 3 operator
They reduce the consumption of the correspond-
ing operator and put the output in a high imped-
ance state.
ORDER CODE
Package
Part Number
TSH94I
Temperature Range
D
-40°C, +125°C
•
Output 1
Inverting Input 1
Non-inverting Input 1
V
CC
+
Non-inverting Input 2
Inverting Input 2
Output 2
Standby 1 8
1
2
3
4
5
6
7
+
-
+
-
-
+
-
+
16 Output 4
15 Inverting Input 4
14 Non-inverting Input 4
13 V
CC
-
12 Non-inverting Input 3
11 Inverting Input 3
10 Output 3
9
Standby 2
D =
Small Outline Package (SO) - also available in Tape & Reel (DT)
October 2000
1/11
TSH94
SCHEMATIC DIAGRAM
V
CC
+
stdby
stdby
non inverting
input
Internal
V
ref
inverting
input
output
C
c
stdby
stdby
V
CC
-
MAXIMUM RATINGS
Symbol
V
CC
V
id
V
i
T
oper
T
stg
Supply Voltage
1)
Differential Input Voltage
2)
Input Voltage
3)
Operating Free-Air Temperature range
Storage Temperature Range
Parameter
Value
14
±5
-0.3 to 12
-40 to +125
-65 to +150
Unit
V
V
V
°C
°C
1. All voltages values, except differential voltage are with respect to network ground terminal
2. Differential voltages are the non-inverting input terminal with respect to the inverting input terminal
3. The magnitude of input and output voltages must never exceed V
CC+
+0.3V
OPERATING CONDITIONS
Symbol
V
CC
V
ic
Supply Voltage
Common Mode Input Voltage Range
Parameter
Value
7 to 12
V
CC
-
+2 to V
CC
+
-1
Unit
V
V
2/11
TSH94
ELECTRICAL CHARACTERISTICS
V
CC
+
= 5V, V
CC
-
= -5V, pin 8 connected to 0V, pin 9 connected to V
CC
+
, T
amb
= 25°C
(unless otherwise specified)
Symbol
V
io
I
io
I
ib
I
CC
CMR
SVR
Avd
Parameter
Input Offset Voltage V
ic
= V
o
= 0V
T
min
.
≤
T
amb
≤
T
max.
Input Offset Current
T
min
.
≤
T
amb
≤
T
max.
Input Bias Current
.
T
min
.
≤
T
amb
≤
T
max.
Supply Current (per amplifier, no load)
T
min
.
≤
T
amb
≤
T
max.
Common-mode Rejection Ratio V
ic
= -3V to +4V, V
o
= 0V
T
min
.
≤
T
amb
≤
T
max.
Supply Voltage Rejection Ratio V
CC
= ±5V to ±3V
T
min
.
≤
T
amb
≤
T
max
Large Signal Voltage Gain R
L
= 10kΩ, Vo = ±2.5V
T
min
.
≤
T
amb
≤
T
max.
High Level Output Voltage V
id
= 1V
V
OH
T
min
.
≤
T
amb
≤
T
max.
Low Level Output Voltage V
id
= 11V
V
OL
T
min
.
≤
T
amb
≤
T
max.
Output Short Circuit Current Vid = ±1V
I
o
T
min
.
≤
T
amb
≤
T
max.
Source
Sink
Source
Sink
20
20
15
15
90
36
40
mA
R
L
= 600Ω
R
L
= 150Ω
R
L
= 150Ω
-3.5
-2.8
-3
-2.5
-2.4
V
R
L
= 600Ω
R
L
= 150Ω
R
L
= 150Ω
3
2.5
2.4
3.5
3
V
80
70
60
50
57
54
1
5
4.5
100
75
70
Min.
Typ.
Max.
3
5
2
5
15
20
6
8
Unit
mV
µA
µA
mA
dB
dB
dB
GBP
f
T
SR
e
n
φm
V
O1
/V
O2
Gf
THD
∆G
∆ϕ
Gain Bandwidth Product
A
VCL
= 100, R
L
= 600Ω, C
L
= 15pF, f = 7.5MHz
Transition Frequency
Slew Rate
V
in
= -2 to +2V, A
VCL
= +1, R
L
= 600Ω, C
L
= 15pF
Equivalent Input Voltage Noise R
s
= 50Ω, f = 1kHz
Phase Margin A
VM
= +1
Channel Seperation f = 1MHz to 10MHz
Gain Flatness f = DC to 6MHz, A
VCL
= 10dB
Total Harmonic Distortion f = 1kHz, V
o
= ±2.5V, R
L
= 600Ω
Differential Gain f = 3.58MHz, A
VCL
= +2, R
L
= 150Ω
Differential Phase f = 3.58MHz, A
VCL
= +2, R
L
= 150Ω
150
90
MHz
MHz
V/µs
nV/√Hz
Degrees
dB
0.1
dB
%
%
Degree
70
110
4.2
35
65
0.01
0.03
0.07
3/11
TSH94
STANDBY MODE
V
CC
+
= 5V, V
CC
-
= -5V, T
amb
= 25°C (unless otherwise specified)
Symbol
V
SBY
I
CC SBY
I
sol
t
ON
t
OFF
I
D
I
OL
I
IL
Parameter
Pin 8/9 Threshold Voltage for STANDBY Mode
Total Consumption
Standby 1 & 2 = 0
Standby 1 & 2 = 1
Standby 1 = 1, Standby 2 = 0
Input/Output Isolation (f = 1MHz to 10MHz)
Time from Standby Mode to Active Mode
Time from Active Mode to Standby Mode
Standby Driving Current
Output Leakage Current
Input Leakage Current
LOGIC INPUT
Standby 1
0
0
1
1
Standby 2
0
1
0
1
Op-Omp 2
Enable
Enable
Standby
Standby
STATUS
Op-Amp 3
Standby
Enable
Standby
Enable
Op-Amp 1 & 4
Enable
Enable
Enable
Enable
Min.
Typ.
Max.
Unit
V
V
CC
+
-2.2
V
CC
+
-1.6
13.7
13.7
9.4
70
200
200
2
20
20
V
CC
+
-1.0
mA
dB
ns
ns
pA
pA
pA
STANDBY POSITION
V
CC
standby
STANDBY MODE
To put the device in standby, just apply a logic
level on the standby MOS input. As ground is a vir-
tual level for the device, threshold voltage has
been refered to V
CC
+
at V
CC
+
- 1.6V typ.
In standby mode, the output goes in high imped-
ance in 200ns. Be aware that all maximum rating
must still be followed in this mode. It leads to
swing limitation while using the device in signal
multiplexing configuration with followers, differen-
tial input voltage must not exceed
±5V
limiting in-
put swing to 2.5Vpp.
SAMPLE AND HOLD
V
CC
APPLICATIONS
SIGNAL MULTIPLEXING
4/11
TSH94
APPLICATIONS
VIDEO LINE TRANSCEIVER WITH REMOTE CONTROL
PRINTED CIRCUIT LAYOUT
As for any high frequency device, a few rules must
be observed when designing the PCB to get the
best performances from this high speed op amp.
From the most to the least important points :
u
Each power supply lead has to be
by-passed to ground with a 10nF ceramic
capacitor very close to the device and
10µF capacitor.
u
To provide low inductance and low resist-
ance common return, use a ground plane
or common point return for power and sig-
nal.
u
All leads must be wide and as short as pos-
sible especially for op amp inputs. This is in
order to decrease parasitic capacitance
and inductance.
u
Use small resistor values to decrease time
constant with parasitic capacitance.
u
Choose component sizes as small as pos-
sible (SMD).
u
On output, decrease capacitor load so as
to avoid circuit stability being degraded
which may cause oscillation. You can also
add a serial resistor in order to minimise its
influence.
5/11
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