FeaTures
n
n
n
n
n
n
n
LTC6995-1/LTC6995-2
TimerBlox: Long Timer, Low
Frequency Oscillator
DescripTion
The
LTC
®
6995
is a silicon oscillator with a programmable
period range of 1.024ms to 9.54 hours (29.1µHz to 977Hz),
specifically intended for long duration timing events. The
LTC6995 is part of the TimerBlox
®
family of versatile
silicon timing devices.
A single resistor, R
SET
, programs the LTC6995’s internal
master oscillator frequency. The output clock period
is determined by this master oscillator and an internal
frequency divider, N
DIV
, programmable to eight settings
from 1 to 2
21
.
t
OUT
=
N
DIV
• R
SET
• 1.024ms, N
DIV
=
1,8,64,...,2
21
50kΩ
n
n
n
n
Period Range: 1ms to 9.5 Hours
Timing Reset by Power-On or Reset Input
Configured with 1 to 3 Resistors
<1.5% Maximum Frequency Error
Programmable Output Polarity
2.25V to 5.5V Single Supply Operation
55µA to 80µA Supply Current
(2ms to 9.5hr Clock Period)
500µs Start-Up Time
CMOS Output Driver Sources/Sinks 20mA
–55°C to 125°C Operating Temperature Range
Available in Low Profile (1mm) SOT-23 (ThinSOT™)
and 2mm
×
3mm DFN Packages
applicaTions
n
n
n
n
n
n
Power-On Reset Timer
Long Time One Shot
“Heartbeat” Timers
Watchdog Timers
Periodic “Wake-Up” Call
High Vibration, High Acceleration Environments
When oscillating, the LTC6995 generates a 50% duty
cycle square wave output. A reset function is provided
to stop the master oscillator and clear internal dividers.
Removing reset initiates a full output clock cycle which
is useful for programmable power on reset and watchdog
timer applications.
The LTC6995 has two versions of reset functionality. The
reset input is active high for the LTC6995-1 and active low
for the LTC6995-2. The polarity of the output when reset
is selectable for both versions.
OUTPUT (OSCILLATOR START STATE)
RST/RST
0
1
0
1
POLARITY
0
0
1
1
LTC6995-1
Oscillating (Low)
0 (Reset)
Oscillating (High)
1 (Reset)
LTC6995-2
0 (Reset)
Oscillating (Low)
1 (Reset)
Oscillating (High)
L,
LT, LTC, LTM, Linear Technology, TimerBlox and the Linear logo are registered trademarks
and ThinSOT is a trademark of Linear Technology Corporation. All other trademarks are the
property of their respective owners.
Typical applicaTion
RST
GND
SET
OUT
V
+
LTC6995-1
Active Low Power-On Reset Timer
V
+
V
+
1M
0.1µF
OUT
5 SECONDS
1/2 t
OUT
POWER-ON RESET
(1ms TO 4.8 HOURS)
TIMER STOPPED
118k
DIV
392k
699512 TA01
699512f
For more information
www.linear.com/6995
1
LTC6995-1/LTC6995-2
absoluTe MaxiMuM raTings
(Note 1)
Supply Voltage (V
+
) to GND ........................................6V
Maximum Voltage
on Any Pin ................ (GND – 0.3V) ≤ V
PIN
≤ (V
+
+ 0.3V)
Operating Temperature Range (Note 2)
LTC6995C ............................................–40°C to 85°C
LTC6995I .............................................–40°C to 85°C
LTC6995H .......................................... –40°C to 125°C
LTC6995MP ....................................... –55°C to 125°C
Specified Temperature Range (Note 3)
LTC6995C ................................................ 0°C to 70°C
LTC6995I .............................................–40°C to 85°C
LTC6995H .......................................... –40°C to 125°C
LTC6995MP ....................................... –55°C to 125°C
Junction Temperature ........................................... 150°C
Storage Temperature Range .................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
S6 Package ........................................................... 300°C
pin conFiguraTion
LTC6995-1/LTC6995-2
TOP VIEW
V
+
1
DIV 2
SET 3
7
GND
6 OUT
5 GND
4 RST/RST
RST/RST 1
GND 2
SET 3
LTC6995-1/LTC6995-2
TOP VIEW
6 OUT
5 V
+
4 DIV
DCB PACKAGE
6-LEAD (2mm
×
3mm) PLASTIC DFN
T
JMAX
= 150°C,
θ
JA
= 64°C/W,
θ
JC
= 9.6°C/W
EXPOSED PAD (PIN 7) CONNECTED TO GND,
PCB CONNECTION OPTIONAL
S6 PACKAGE
6-LEAD PLASTIC TSOT-23
T
JMAX
= 150°C,
θ
JA
= 192°C/W,
θ
JC
= 51°C/W
orDer inForMaTion
Lead Free Finish
TAPE AND REEL (MINI)
LTC6995IDCB-1#TRMPBF
TAPE AND REEL
LTC6995IDCB-1#TRPBF
PART MARKING*
LGJM
LGJM
LGJM
LGJP
LGJP
LGJP
LTGJN
LTGJN
LTGJN
LTGJN
LTGJQ
LTGJQ
LTGJQ
LTGJQ
PACKAGE DESCRIPTION
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead (2mm
×
3mm) Plastic DFN
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
6-Lead Plastic TSOT-23
SPECIFIED TEMPERATURE RANGE
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
–55°C to 125°C
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
–55°C to 125°C
LTC6995CDCB-1#TRMPBF LTC6995CDCB-1#TRPBF
LTC6995HDCB-1#TRMPBF LTC6995HDCB-1#TRPBF
LTC6995CDCB-2#TRMPBF LTC6995CDCB-2#TRPBF
LTC6995IDCB-2#TRMPBF
LTC6995CS6-1#TRMPBF
LTC6995IS6-1#TRMPBF
LTC6995HS6-1#TRMPBF
LTC6995CS6-2#TRMPBF
LTC6995IS6-2#TRMPBF
LTC6995HS6-2#TRMPBF
LTC6995IDCB-2#TRPBF
LTC6995CS6-1#TRPBF
LTC6995IS6-1#TRPBF
LTC6995HS6-1#TRPBF
LTC6995CS6-2#TRPBF
LTC6995IS6-2#TRPBF
LTC6995HS6-2#TRPBF
LTC6995HDCB-2#TRMPBF LTC6995HDCB-2#TRPBF
LTC6995MPS6-1#TRMPBF LTC6995MPS6-1#TRPBF
LTC6995MPS6-2#TRMPBF LTC6995MPS6-2#TRPBF
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on lead based finish parts.
For more information on lead free part marking, go to:
http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to:
http://www.linear.com/tapeandreel/
699512f
2
For more information
www.linear.com/6995
LTC6995-1/LTC6995-2
elecTrical characTerisTics
SYMBOL
t
OUT
f
OUT
∆f
OUT
∆f
OUT
/∆T
∆f
OUT
/∆V
+
PARAMETER
Output Clock Period
Output Frequency
Frequency Accuracy (Note 4)
Frequency Drift Over Temperature
Frequency Drift Over Supply
Long-Term Frequency Stability
Period Jitter (Note 10)
BW
t
S
Analog Inputs
V
SET
∆V
SET
/∆T
R
SET
V
DIV
∆V
DIV
/∆V
+
Voltage at SET Pin
V
SET
Drift Over Temperature
Frequency-Setting Resistor
DIV Pin Voltage
DIV Pin Valid Code Range (Note 5)
DIV Pin Input Current
Power Supply
V
+
I
S
Operating Supply Voltage Range
Power-On Reset Voltage
Supply Current
R
L
= ∞, R
SET
= 50k
R
L
= ∞, R
SET
= 100k
R
L
= ∞, R
SET
= 800k
R
L
= ∞, I
SET
= 0µA
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 2.25V
l
l
l
l
l
l
l
l
l
l
l
l
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, RST = 0V for LTC6995-1,
RST
= V
+
for LTC6995-2, DIVCODE = 0 to 15 (N
DIV
= 1 to 2
21
), R
SET
= 50k to 800k, R
LOAD
= 5k, C
LOAD
= 5pF unless otherwise noted.
CONDITIONS
MIN
1.024m
29.1µ
29.1µHz ≤ f
OUT
≤ 977Hz
l
l
TYP
MAX
34,360
977
UNITS
Seconds
Hz
%
%
%/°C
%/V
%/V
ppm/√kHr
ppm
RMS
ppm
RMS
Hz
Cycle
±0.8
±0.005
0.23
0.06
90
15
7
0.4 • f
OUT
1
0.97
50
0
1.00
±75
±1.5
±2.2
0.55
0.16
V
+
= 4.5V to 5.5V
V
+
= 2.25V to 4.5V
(Note 11)
N
DIV
= 1
N
DIV
= 8
l
l
Frequency Modulation Bandwidth
Frequency Change Settling Time (Note 9)
1.03
800
V
+
±1.5
±10
V
µV/°C
kΩ
V
%
nA
V
V
µA
µA
µA
µA
µA
µA
µA
µA
Deviation from Ideal
V
DIV
/V
+
= (DIVCODE + 0.5)/16
l
l
2.25
135
105
100
80
65
55
60
52
5.5
1.95
170
135
130
105
100
85
699512f
For more information
www.linear.com/6995
3
LTC6995-1/LTC6995-2
elecTrical characTerisTics
SYMBOL
Digital I/O
PARAMETER
RST Pin Input Capacitance
RST Pin Input Current
High Level RST Pin Input Voltage
Low Level RST Pin Input Voltage
Output Output Current
High Level Output Voltage (Note 7)
The
l
denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. Test conditions are V
+
= 2.25V to 5.5V, RST = 0V for LTC6995-1,
RST
= V
+
for LTC6995-2, DIVCODE = 0 to 15 (N
DIV
= 1 to 2
21
), R
SET
= 50k to 800k, R
LOAD
=
∞,
C
LOAD
= 5pF unless otherwise noted.
CONDITIONS
MIN
TYP
2.5
RST = 0V to V
+
(Note 6)
(Note 6)
V
+
= 2.7V to 5.5V
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
±10
l
l
MAX
UNITS
pF
nA
V
V
mA
V
V
V
V
V
V
V
V
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
IH
V
IL
I
OUT(MAX)
V
OH
0.7 • V
+
0.3 • V
+
5.45
4.84
3.24
2.75
2.17
1.58
±20
5.48
5.15
3.27
2.99
2.21
1.88
0.02
0.26
0.03
0.22
0.03
0.26
16
24
40
5
1.1
1.7
2.7
1.0
1.6
2.4
V
OL
Low Level Output Voltage (Note 7)
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
t
RST
t
WIDTH
t
r
t
f
Reset Propagation Delay
Minimum Input Pulse Width
Output Rise Time (Note 8)
Output Fall Time (Note 8)
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
V
+
= 3.3V
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
V
+
= 5.5V
V
+
= 3.3V
V
+
= 2.25V
I
OUT
= –1mA
I
OUT
= –16mA
I
OUT
= –1mA
I
OUT
= –10mA
I
OUT
= –1mA
I
OUT
= –8mA
I
OUT
= 1mA
I
OUT
= 16mA
I
OUT
= 1mA
I
OUT
= 10mA
I
OUT
= 1mA
I
OUT
= 8mA
l
l
l
l
l
l
l
l
l
l
l
l
0.04
0.54
0.05
0.46
0.07
0.54
Note 1:
Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2:
The LTC6995C is guaranteed functional over the operating
temperature range of –40°C to 85°C.
Note 3:
The LTC6995C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6995C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but it is not tested or
QA sampled at these temperatures. The LTC6995I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6995H is guaranteed
to meet specified performance from –40°C to 125°C. The LTC6995MP is
guaranteed to meet specified performance from –55°C to 125°C.
Note 4:
Frequency accuracy is defined as the deviation from the f
OUT
equation, assuming R
SET
is used to program the frequency.
Note 5:
See Operation section, Table 1 and Figure 2 for a full explanation
of how the DIV pin voltage selects the value of DIVCODE.
Note 6:
The RST pin has hysteresis to accommodate slow rising or falling
signals. The threshold voltages are proportional to V
+
. Typical values can
be estimated at any supply voltage using V
RST(RISING)
≈ 0.55 • V
+
+ 185mV
and V
RST(FALLING)
≈ 0.48 • V
+
– 155mV.
Note 7:
To conform to the Logic IC Standard, current out of a pin is
arbitrarily given a negative value.
Note 8:
Output rise and fall times are measured between the 10% and the
90% power supply levels with 5pF output load. These specifications are
based on characterization.
Note 9:
Settling time is the amount of time required for the output to settle
within ±1% of the final frequency after a 0.5× or 2× change in I
SET
.
Note 10:
Jitter is the ratio of the deviation of the period to the mean of the
period. This specification is based on characterization and is not 100%
tested.
Note 11:
Long-term drift of silicon oscillators is primarily due to the
movement of ions and impurities within the silicon and is tested at 30°C
under otherwise nominal operating conditions. Long-term drift is specified
as ppm/√kHr due to the typically nonlinear nature of the drift. To calculate
drift for a set time period, translate that time into thousands of hours, take
the square root and multiply by the typical drift number. For instance, a
year is 8.77kHr and would yield a drift of 266ppm at 90ppm/√kHr. Drift
without power applied to the device may be approximated as 1/10th of the
drift with power, or 9ppm/√kHr for a 90ppm/√kHr device.
699512f
4
For more information
www.linear.com/6995
LTC6995-1/LTC6995-2
Typical perForMance characTerisTics
+
V = 3.3V, R
SET
= 200k, T
A
= 25°C unless otherwise noted.
Frequency Error vs Temperature
3
GUARANTEED MAX OVER TEMPERATURE
2
1
ERROR (%)
0
–1
–2
GUARANTEED MIN OVER TEMPERATURE
R
SET
= 50k
3 PARTS
ERROR (%)
2
1
0
–1
–2
GUARANTEED MIN OVER TEMPERATURE
3
GUARANTEED MAX OVER TEMPERATURE
R
SET
= 200k
3 PARTS
ERROR (%)
2
1
0
–1
–2
GUARANTEED MIN OVER TEMPERATURE
Frequency Error vs Temperature
3
Frequency Error vs Temperature
GUARANTEED MAX OVER TEMPERATURE
R
SET
= 800k
3 PARTS
–3
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
–3
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
–3
–50 –25
50
25
75
0
TEMPERATURE (°C)
100
125
699512 G01
699512 G02
699512 G03
Frequency Error vs R
SET
3
GUARANTEED MAX OVER TEMPERATURE
2
1
ERROR (%)
DRIFT (%)
0
–1
–2
–3
GUARANTEED MIN OVER TEMPERATURE
3 PARTS
0.5
0.4
0.3
Frequency Drift vs Supply Voltage
250
Typical V
SET
Distribution
2 LOTS
DFN AND SOT-23
1274 UNITS
200
NUMBER OF UNITS
6
699512 G05
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
0
200
400
R
SET
(k )
600
800
699512 G04
150
100
–0.5
REFERENCED TO V
+
= 4.5V
R
SET
= 50k
R
SET
= 200k
R
SET
= 800k
2
4
3
5
SUPPLY VOLTAGE (V)
50
0
0.98
0.988
0.996
1.004
V
SET
(V)
1.012
1.02
699512 G06
1.0
0.8
0.6
0.4
V
SET
Drift vs I
SET
1.0
0.8
0.6
0.4
DRIFT (mV)
V
SET
Drift vs Supply
1.020
1.015
1.010
1.005
V
SET
(V)
1.000
0.995
0.990
REFERENCED TO V
+
= 4V
2
3
4
SUPPLY (V)
5
699512 G08
V
SET
vs Temperature
3 PARTS
V
SET
(mV)
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0
5
REFERENCED TO I
SET
= 10µA
10
I
SET
(µA)
15
20
699512 G07
0.2
0
–0.2
–0.4
–0.6
–0.8
–1.0
0.985
6
0.980
–50
–25
75
0
25
50
TEMPERATURE (°C)
100
125
699512 G09
699512f
For more information
www.linear.com/6995
5
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