EVALUATION KIT AVAILABLE
MAX11156
18-Bit, 500ksps, ±5V SAR ADC with Internal
Reference in TDFN
Features
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General Description
The MAX11156 18-bit, 500ksps, SAR ADC offers excel-
lent AC and DC performance with true bipolar input range,
small size, and internal reference. The MAX11156 mea-
sures a ±5V (10V
P-P
) input range while operating from a
single 5V supply. A patented charge-pump architecture
allows direct sampling of high- impedance sources. The
MAX11156 integrates an optional 6ppm/°C reference with
internal buffer, saving the cost and space of an external
reference.
The MAX11156 produces 94.6dB SNR and -105dB THD
(typ). The MAX11156 guarantees 18-bit no-missing codes.
The MAX11156 communicates using an SPI-compatible
serial interface at 2.5V, 3V, 3.3V, or 5V logic. The serial
interface can be used to daisy-chain multiple ADCs in
parallel for multichannel applications and provides a busy
indicator option for simplified system synchronization and
timing.
The MAX11156 is offered in a 12-pin, 3mm x 3mm, TDFN
package and is specified over the -40°C to +85°C tem-
perature range.
Applications
●
Data Acquisition Systems
●
Industrial Control Systems/Process Control
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Medical Instrumentation
●
Automatic Test Equipment
Selector Guide
and
Ordering Information
appear at end of
data sheet.
High DC and AC Accuracy
18-Bit Resolution with No Missing Codes
SNR: 94.6dB
THD: -105dB at 10kHz
±2.5 LSB INL (typ)
±0.4 LSB DNL (typ)
Internal Reference and Reference Buffer Save Cost
and Board Space
6ppm/°C (typ)
Tiny 12-Pin 3mm x 3mm TDFN Package
Bipolar ±5V Analog Input Range Saves External
Signal Conditioning
Single-Supply ADC with Low Power
5V Analog Supply
2.3V to 5V Digital Supply
26.5mW at 500ksps
Shutdown Mode
500ksps Throughput Rate
No Pipeline Delay/Latency
Flexible Industry-Standard Serial Interface Saves I/O
Pins
SPI/QSPI™/MICROWIRE
®
/DSP-Compatible
QSPI is a trademark of Motorola, Inc.
MICROWIRE is a registered trademark of National
Semiconductor Corporation.
For related parts and recommended products to use with this part, refer
to
www.maximintegrated.com/MAX11156.related
.
Typical Operating Circuit
1µF
V
DD
(5V)
1µF
OVDD
(2.3V TO 5V)
SCLK
50Ω
±5V
MAX9632
500pF
AIN+
AIN-
18-BIT ADC
INTERFACE
AND CONTROL
DIN
DOUT
CNVST
HOST
CONTROLLER
MAX11156
REF
REF
BUF
AGNDS
CONFIGURATION REGISTER
INTERNAL REFERENCE
REFIO
GND
0.1µF
10µF
19-6622; Rev 0; 3/13
MAX11156
18-Bit, 500ksps, ±5V SAR ADC
with Internal Reference in TDFN
Absolute Maximum Ratings
V
DD
to GND ............................................................-0.3V to +6V
OVDD to GND ....... -0.3V to the lower of (V
DD
+ 0.3V) and +6V
AIN+ to GND ........................................................................
Q7V
AIN-, REF, REFIO, AGNDS
to GND............... -0.3V to the lower of (V
DD
+ 0.3V) and +6V
SCLK, DIN, DOUT, CNVST
to GND............... -0.3V to the lower of (V
DD
+ 0.3V) and +6V
Maximum Current into Any Pin...........................................50mA
Continuous Power Dissipation (T
A
= +70NC)
TDFN (derate 18.2mW/NC above +70NC) ..................1349mW
Operating Temperature Range ........................... -40NC to +85NC
Junction Temperature ......................................................+150NC
Storage Temperature Range ............................ -65NC to +150NC
Lead Temperature (soldering, 10s) ................................. +300NC
Soldering Temperature (reflow) .......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Package Thermal Characteristics (Note 1)
TDFN
Junction-to-Ambient Thermal Resistance (q
JA
)........59.3°C/W
Junction-to-Case Thermal Resistance (q
JC
) ............22.5°C/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
Electrical Characteristics
(V
DD
= 4.75V to 5.25V, V
OVDD
= 2.3V to 5.25V, f
SAMPLE
= 500kHz, V
REF
= 4.096V, Reference Mode 3; T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
ANALOG INPUT (Note 3)
Input Voltage Range
Absolute Input Voltage Range
Input Leakage Current
Input Capacitance
Input-Clamp Protection Current
DC ACCURACY (Note 4)
Resolution
No Missing Codes
Offset Error
Offset Temperature Coefficient
Gain Error
Gain Error Temperature
Coefficient
Integral Nonlinearity
Differential Nonlinearity
Positive Full-Scale Error
Negative Full-Scale Error
DNL
T
A
= T
MIN
to T
MAX
T
A
= +25°C to +85°C
-8
-6
-0.9
-55
-45
-40
N
18
18
-1.5
-40
±0.1
±2.6
±2.4
±8
±1
±2.5
±2.5
±0.5
+8
+6
+0.9
+55
+45
+40
+1.5
+40
Bits
Bits
mV
LSB
µV/°C
LSB
ppm/°C
LSB
LSB
LSB
LSB
Both inputs
-20
AIN+ to AIN-, K = 5.0/4.096
AIN+ to GND
AIN- to GND
Acquisition phase
-K x V
REF
-(V
DD
+
0.1)
-0.1
-10
+0.001
15
+20
+K x V
REF
+(V
DD
+
0.1)
+0.1
+10
µA
pF
mA
V
V
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
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Maxim Integrated
│
2
MAX11156
18-Bit, 500ksps, ±5V SAR ADC
with Internal Reference in TDFN
Electrical Characteristics (continued)
(V
DD
= 4.75V to 5.25V, V
OVDD
= 2.3V to 5.25V, f
SAMPLE
= 500kHz, V
REF
= 4.096V, Reference Mode 3; T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
Analog Input CMR
Power-Supply Rejection (Note 5)
Transition Noise
REFERENCE (Note 7)
REF Output Initial Accuracy
REF Output Temperature
Coefficient
REFIO Output Initial Accuracy
REFIO Output Temperature
Coefficient
REFIO Output Impedance
REFIO Input Voltage Range
Reference Buffer Initial Offset
Reference Buffer Temperature
Coefficient
External Compensation
Capacitor
REF Voltage Input Range
REF Input Capacitance
REF Load Current
AC ACCURACY (Note 6)
V
REF
= 4.096V,
reference mode 3
f
IN
=
10kHz
V
REF
= 4.096V,
reference mode 1
V
REF
= 2.5V,
reference mode 3
Internal reference,
reference mode 0
V
REF
= 4.096V,
reference mode 3
Signal-to-Noise Plus Distortion
(Note 7)
f
IN
=
10kHz
VREF = 4.096V,
reference mode 1
V
REF
= 2.5V,
reference mode 3
Internal reference,
reference mode 0
91.5
93
94.6
93.7
dB
90.6
93.6
94.2
93.0
dB
90.2
92.8
C
EXT
V
REF
V
REF
TC
REF
V
REFIO
TCREFIO
Reference mode 0
Reference mode 0
Reference modes 0 and 2
Reference modes 0 and 2
Reference modes 0 and 2
Reference mode 1
Reference mode 1
Reference mode 1
Required for reference modes 0
and 1, recommended for reference
modes 2 and 3
Reference modes 2 and 3
Reference modes 2 and 3
3
-500
-10
±6
4.092
-17
4.092
-15
4.096
±9
4.096
±6
10
4.096
4.25
+500
+10
4.100
+17
4.100
+15
V
ppm/°C
V
ppm/°C
kΩ
V
µV
µV/°C
SYMBOL
CMR
PSR
CONDITIONS
MIN
TYP
-77
±8.0
1.7
MAX
UNITS
dB
LSB
LSB
RMS
10
2.5
20
130
4.25
µF
V
pF
µA
Signal-to-Noise Ratio (Note 7)
SNR
SINAD
www.maximintegrated.com
Maxim Integrated
│
3
MAX11156
18-Bit, 500ksps, ±5V SAR ADC
with Internal Reference in TDFN
Electrical Characteristics (continued)
(V
DD
= 4.75V to 5.25V, V
OVDD
= 2.3V to 5.25V, f
SAMPLE
= 500kHz, V
REF
= 4.096V, Reference Mode 3; T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
Spurious-Free Dynamic Range
Total Harmonic Distortion
Intermodulation Distortion
(Note 8)
SAMPLING DYNAMICS
Throughput Sample Rate
Transient Response
Full-Power Bandwidth
Aperture Delay
Aperture Jitter
POWER SUPPLIES
Analog Supply Voltage
Interface Supply Voltage
Analog Supply Current
V
DD
Shutdown Current
Interface Supply Current (Note 9)
OVDD Shutdown Current
V
DD
= 5V, V
OVDD
= 3.3V,
Reference Mode = 2 and 3
V
DD
= 5V, V
OVDD
= 3.3V,
Reference Mode = 0 and 1
0.7 x
V
OVDD
0.3 x
V
OVDD
±0.05 x
V
OVDD
10
V
IN
= 0V or V
OVDD
-10
V
OVDD
- 0.4
+10
V
OVDD
= 2.3V
V
OVDD
= 5.25V
V
DD
V
OVDD
I
VDD
Internal reference mode
External reference mode
4.75
2.3
5.0
3.0
6.0
3.6
6.3
1.7
4.4
0.9
26.5
mW
38.5
5.25
5.25
6.5
4.0
10
2.0
5.0
10
V
V
mA
µA
mA
µA
Full-scale step
-3dB point
-0.1dB point
6
> 0.2
2.5
50
0.01
500
400
ksps
ns
MHz
ns
ps
RMS
SYMBOL
SFDR
THD
IMD
CONDITIONS
MIN
96
TYP
105
-105
-115
-96
MAX
UNITS
dB
dB
dBFS
Power Dissipation
DIGITAL INPUTS (DIN, SCLK, CNVST)
Input Voltage High
Input Voltage Low
Input Hysteresis
Input Capacitance
Input Current
DIGITAL OUTPUT (DOUT)
Output Voltage High
V
OH
I
SOURCE
= 2mA
V
V
IH
V
IL
V
HYS
C
IN
I
IN
V
V
V
pF
µA
www.maximintegrated.com
Maxim Integrated
│
4
MAX11156
18-Bit, 500ksps, ±5V SAR ADC
with Internal Reference in TDFN
Electrical Characteristics (continued)
(V
DD
= 4.75V to 5.25V, V
OVDD
= 2.3V to 5.25V, f
SAMPLE
= 500kHz, V
REF
= 4.096V, Reference Mode 3; T
A
= T
MIN
to T
MAX
, unless
otherwise noted. Typical values are at T
A
= +25NC.) (Note 2)
PARAMETER
Output Voltage Low
Three-State Leakage Current
Three-State Output Capacitance
TIMING (Note 9)
Time Between Conversions
Conversion Time
Acquisition Time
CNVST Pulse Width
SCLK Period (CS Mode)
t
CYC
t
CONV
t
ACQ
t
CNVPW
t
SCLK
CNVST rising to data available
t
ACQ
= t
CYC
- t
CONV
CS
mode
V
OVDD
> 4.5V
V
OVDD
> 2.7V
V
OVDD
> 2.3V
SCLK Period (Daisy-Chain
Mode)
SCLK Low Time
SCLK High Time
SCLK Falling Edge to Data Valid
Delay
CNVST Low to DOUT D15 MSB
Valid (CS Mode)
CNVST High or Last SCLK
Falling Edge to DOUT High
Impedance
DIN Valid Setup Time from SCLK
Falling Edge
DIN Valid Hold Time from SCLK
Falling Edge
SCLK Valid Setup Time to
CNVST Falling Edge
SCLK Valid Hold Time to CNVST
Falling Edge
V
OVDD
> 4.5V
t
SCLK
t
SCLKL
t
SCLKH
V
OVDD
> 4.5V
t
DDO
V
OVDD
> 2.7V
V
OVDD
> 2.3V
t
EN
t
DIS
V
OVDD
> 2.7V
V
OVDD
< 2.7V
CS
Mode
V
OVDD
> 4.5V
t
SDINSCK
V
OVDD
> 2.7V
V
OVDD
> 2.3V
t
HDINSCK
t
SSCKCNF
t
HSCKCNF
3
5
6
0
3
6
ns
ns
ns
ns
V
OVDD
> 2.7V
V
OVDD
> 2.3V
2
1.35
0.5
5
14
20
26
16
24
30
5
5
12
18
23
14
17
20
ns
ns
ns
ns
ns
ns
100000
1.5
µs
µs
µs
ns
SYMBOL
V
OL
CONDITIONS
I
SINK
= 2mA
-10
15
MIN
TYP
MAX
0.4
+10
UNITS
V
µA
pF
ns
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Maxim Integrated
│
5
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