Datasheet
Serial EEPROM Series Standard EEPROM
Plug & Play EEPROM
BR34E02-3
General Description
BR34E02-3 is 256×8 bit Electrically Erasable PROM (Based on Serial Presence Detect)
Features
256×8 bit Architecture Serial EEPROM
Wide Operating Voltage Range: 1.7V to 5.5V
Two-Wire Serial Interface
Self-Timed Erase and Write Cycle
Page Write Function (16byte)
Write Protect Mode
Settable Reversible Write Protect Function : 00h-7Fh
Write Protect 1 (Onetime Rom)
: 00h-7Fh
Write Protect 2 (Hardwire WP PIN)
: 00h-FFh
Low Power consumption
Write
(at 1.7V) :
0.4mA (typ)
Read
(at 1.7V) :
0.1mA (typ)
Standby
(at 1.7V) :
0.1µA (typ)
Prevention of Write Mistake
Write Protect Feature (WP pin)
Prevention of Write Mistake at Low Voltage
High Reliability Fine Pattern CMOS Technology
More than 1 million write cycles
More than 40 years data retention
Noise Reduction Filtered Inputs in SCL / SDA
Initial delivery state FFh
Packages
W(Typ) x D(Typ) x H(Max)
TSSOP-B8
3.00mm x 6.40mm x 1.20mm
VSON008X2030
2.00mm x 3.00mm x 0.60mm
BR34E02-3
Capacity
2Kbit
Bit Format
256x8
Type
BR34E02FVT-3
BR34E02NUX-3
Power Source
Voltage
1.7V to 5.5V
Package
TSSOP-B8
VSON008X2030
Absolute Maximum Ratings
(Ta=25℃)
Parameter
Supply Voltage
Power Dissipation
Storage Temperature
Operating Temperature
Input Voltage / Output
Voltage (A0)
Input Voltage / Output
Voltage (others)
Electrostatic discharge
voltage
(human body model)
Symbol
V
CC
Pd
Tstg
Topr
-
-
V
ESD
Rating
-0.3 to +6.5
330 (TSSOP-B8)
300 (VSON008X2030)
-65 to +125
-40 to +85
-0.3 to 10.0
-0.3 to V
CC
+1.0
-4000 to +4000
Unit
V
mW
℃
℃
V
V
V
Derate by 3.3mW/°C when operating above Ta=25°C
Derate by 3.0mW/°C when operating above Ta=25°C
Remark
Memory Cell Characteristics
(Ta=25℃, V
CC
=1.7V to 5.5V)
Parameter
Write / Erase Cycle
(1)
Data Retention
(1)
(1) Not 100% TESTED
Limit
Min
1,000,000
40
Typ
-
-
Max
-
-
Unit
Times
Years
○Product
structure：Silicon monolithic integrated circuit
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©2013 ROHM Co., Ltd. All rights reserved.
TSZ22111½14½001
○This
product has no designed protection against radioactive rays
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BR34E02-3
Recommended Operating Ratings
Parameter
Supply Voltage
Input Voltage
Symbol
V
CC
V
IN
Rating
1.7 to 5.5
0 to V
CC
Unit
V
V
Datasheet
DC Characteristics
(Unless otherwise specified Ta=-40℃ to +85℃, V
CC
=1.7V to 5.5V)
Parameter
Input High Voltage
Input Low Voltage
Output Low Voltage 1
Output Low Voltage 2
Input Leakage Current 1
Input Leakage Current 2
Input Leakage Current 3
Output Leakage Current
Supply Current (Write)
Symbol
V
IH
V
IL
V
OL1
V
OL2
I
LI1
I
LI2
I
LI3
I
LO
I
CC1
Limit
Min
0.7 V
CC
-0.3
-
-
-1
-1
-1
-1
-
Typ
-
-
-
-
-
-
-
-
-
Max
Vcc+1.0
0.3 V
CC
0.4
0.2
1
15
20
1
2.0
Unit
V
V
V
V
µA
µA
µA
µA
mA
I
OL
=2.1mA, 2.5V≦V
CC
≦5.5V(SDA)
I
OL
=0.7mA, 1.7V≦V
CC
＜2.5V(SDA)
V
IN
=0V to V
CC
(A0, A1, A2, SCL)
V
IN
=0V to V
CC
(WP)
V
IN
=V
HV
(A0)
V
OUT
=0V to V
CC
V
CC
=5.5V, f
SCL
=400kHz, t
WR
=5ms
Byte Write
Page Write
Write Protect
V
CC
=5.5V, f
SCL
=400kHz
Random Read
Current Read
Sequential Read
V
CC
=5.5V, SDA, SCL= V
CC
A0, A1, A2=GND, WP=GND
V
HV
-V
CC
≧4.8V
Test Conditions
Supply Current (Read)
I
CC2
-
-
0.5
mA
Standby Current
A0 HV Voltage
I
SB
V
HV
-
7
-
-
2.0
10
µA
V
AC Characteristics
(Unless otherwise specified Ta=-40℃ to +85℃, V
CC
=1.7V to 5.5V)
Parameter
Clock Frequency
Data Clock High Period
Data Clock Low Period
SDA and SCL Rise Time
( 1)
SDA and SCL Fall Time
(1)
Start Condition Hold Time
Start Condition Setup Time
Input Data Hold Time
Input Data Setup Time
Output Data Delay Time
Output Data Hold Time
Stop Condition Setup Time
Bus Free Time
Write Cycle Time
Noise Spike Width
(SDA and SCL)
WP Hold Time
WP Setup Time
WP High Period
(1) Not 100% TESTED
Symbol
f
SCL
t
HIGH
t
LOW
t
R
t
F
t
HD:STA
t
SU:STA
t
HD:DAT
t
SU:DAT
t
PD
t
DH
t
SU:STO
t
BUF
t
WR
t
I
t
HD:WP
t
SU:WP
t
HIGH:WP
Limit
Min
-
0.6
1.2
-
-
0.6
0.6
0
100
0.1
0.1
0.6
1.2
-
-
0
0.1
1.0
Typ
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Max
400
-
-
0.3
0.3
-
-
-
-
0.9
-
-
-
5
0.1
-
-
-
Unit
kHz
µs
µs
µs
µs
µs
µs
ns
ns
µs
µs
µs
µs
ms
µs
µs
µs
µs
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BR34E02-3
Serial Input / Output Timing
t
R
SCL
t
HD
:STA
SDA
(IN)
t
BUF
SDA
(OUT)
t
PD
t
DH
t
SU
：WP
Datasheet
t
F
t
HIGH
SCL
DATA(1)
DATA(n)
D0
ACK
ACK
t
SU
:DAT t
LOW
t
HD
:DAT
SDA
D1
WP
t
WR
STOP CONDITION
tHD：WP
Figure 1-(a). Serial Input / Output Timing
○SDA
data is latched into the chip at the rising edge of SCL clock.
○Output
data toggles at the falling edge of SCL clock.
Figure 1-(d). WP Timing of the Write Operation
SCL
SCL
t
SU
:STA
SDA
START BIT
t
HD
:STA
t
SU
:STO
SDA
DATA(1)
D1
D0
ACK
DATA(n)
ACK
t
HIGH : WP
t
WR
WP
STOP BIT
Figure 1-(b). Start/Stop Bit Timing
Figure 1-(e). WP Timing of the Write Cancel Operation
○For
WRITE operation, WP must be "Low" from the rising edge of the
SCL
clock (which takes in D0 of first byte) until the end of t
WR
. (See Figure
1-(d) ) During this period, WRITE operation can be canceled by setting
WP "High".（See Figure 1-(e)）
SDA
D0
ACK
WRITE DATA(n)
STOP
CONDITION
t
WR
START
CONDITION
○When
WP is set to "High" during t
WR
, WRITE operation is immediately
ceased, making the data unreliable. It must then be re-written.
Figure 1-(c). Write Cycle Timing
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TSZ22111・15・001
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BR34E02-3
Block Diagram
PROTECT_MEMORY_ARRAY
2Kbit_MEMORY_ARRAY
Datasheet
A0 1
8bit
V
CC
8
VCC
8bit
A1 2
ADDRESS
DECODER
SLAVE , WORD
8bit
ADDRESS
DATA
REGISTE
7 WP
START
STOP
A2 3
CONTOROL LOGIC
ACK
6 SCL
GND 4
Pin Configuration
HIGH VOLTAGE
V
CC
LEVEL DETECT
5 SDA
(TOP VIEW)
A0 1
A1 2
BR34E02-3
8 VCC
7 WP
6 SCL
5 SDA
A2 3
GND 4
Pin Descriptions
Pin Name
VCC
GND
A0, A1, A2
SCL
SDA
WP
Input/Output
-
-
IN
IN
IN / OUT
IN
Power supply
Ground 0V
Slave address set
(1)
Serial clock input
Slave and word address
Serial data input, serial data output
Write protect input
(3)
(2)
Descriptions
(1) A0, A1 and A2 are not allowed to use as open.
(2) Open drain output requires a pull-up resistor.
(3) WP Pin has a Pull-Down resistor. Please leave unconnected or connect to GND when not in use.
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TSZ02201-0R2R0G100520-1-2
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BR34E02-3
Typical Performance Curves
Datasheet
Input High Voltage: V
IH
VIH(V)
(V)
Input Low Voltage: V
IL
(V)
VIL(V)
Supply Voltage : V
CC
(V)
Figure 2. Input High Voltage vs Supply Voltage
(A0, A1, A2, SCL, SDA, WP)
Supply Voltage : V
CC
(V)
Figure 3. Input Low Voltage vs Supply Voltage
(A0, A1, A2, SCL, SDA, WP)
Output Low Voltage1: V
OL1
(V)
Output Low Current: I
OL
(mA)
Figure 4. Output Low Voltage1 vs Output Low Current
(Vcc=2.5V)
Output Low Voltage2: V
OL2
(V)
Output Low Current: I
OL
(mA)
Figure 5. Output Low Voltage2 vs Output Low Current
(Vcc=1.7V)
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© 2013 ROHM Co., Ltd. All rights reserved.
TSZ22111・15・001
5/30
TSZ02201-0R2R0G100520-1-2
31.May.2013 Rev.003
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