Operating Temperature Range ........................ -40NC to +125NC
Storage Temperature ....................................... -65NC to +150NC
Junction Temperature .....................................................+150NC
Lead Temperature (soldering, 10s) ................................+300NC
Soldering Temperature (reflow) ......................................+260NC
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional opera-
tion of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
PACKAGE THERMAL CHARACTERISTICS (Note 1)
SO-8
Junction-to-Ambient Thermal Resistance (B
JA
) ........132NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............38NC/W
TSSOP
Junction-to-Ambient Thermal Resistance (B
JA
) ........110NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............30NC/W
SO-14
FMAX
Junction-to-Ambient Thermal Resistance (B
JA
) .....206.3NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............42NC/W
Junction-to-Ambient Thermal Resistance (B
JA
) ........120NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............37NC/W
SOT23
Junction-to-Ambient Thermal Resistance (B
JA
) .....324.3NC/W
Junction-to-Case Thermal Resistance (B
JC
) ...............82NC/W
Note 1:
Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer
board. For detailed information on package thermal considerations, refer to
www.maximintegrated.com/thermal-tutorial.
ELECTRICAL CHARACTERISTICS
(V
DD
= 10V,
V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, R
L
= 5kI to V
DD
/2, T
A
= -40NC to +125NC, unless otherwise noted. Typical values are
at +25NC.) (Note 2)
PARAMETER
POWER SUPPLY
Supply Voltage Range
Power-Supply Rejection Ratio
(Note 3)
Quiescent Current per Amplifier
DC SPECIFICATIONS
Input Common-Mode Range
V
CM
Guaranteed by CMRR test
T
A
= +25NC, V
CM
= V
SS
- 0.05V to V
DD
-
1.5V
-40NC < T
A
< +125NC, V
CM
= V
SS
- 0.05V
to V
DD
- 1.5V
T
A
= +25NC
-40NC < T
A
< +125NC
10
V
SS
-
0.05
126
120
2
7.5
10
30
FV
nV/NC
130
dB
V
DD
-
1.5
V
V
DD
PSRR
I
DD
Guaranteed by PSRR
T
A
= +25NC, V
IN+
= V
IN-
= V
DD
/2 - 1V
-40NC < T
A
< +125NC
T
A
= +25NC
-40NC < T
A
< +125NC
2.7
140
133
90
130
145
148
36
V
dB
FA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Common-Mode Rejection Ratio
(Note 3)
CMRR
Input Offset Voltage (Note 3)
Input Offset Voltage Drift
(Note 3)
V
OS
TC V
OS
Maxim Integrated
2
MAX44244/MAX44245/MAX44248
36V, Precision, Low-Power, 90µA,
Single/Quad/Dual Op Amps
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 10V,
V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, R
L
= 5kI to V
DD
/2, T
A
= -40NC to +125NC, unless otherwise noted. Typical values are
at +25NC.) (Note 2)
PARAMETER
Input Bias Current (Note 3)
Input Offset Current (Note 3)
SYMBOL
I
B
I
OS
T
A
= +25NC
-40NC < T
A
< +125NC
T
A
= +25NC
-40NC < T
A
< +125NC
V
SS
+ 0.5V
P
V
OUT
P
V
DD
-
0.5V
T
A
= +25NC
-40NC < T
A
< +125NC
140
135
40
80
110
50
75
50
500
0.1
1
A
V
= 1V/V, V
OUT
= 2V
P-P
No sustained oscillation, A
V
= 1V/V
V
OUT
= 2V
P-P
, A
V
= +1V/V, f = 1kHz
f = 400MHz
EMI Rejection Ratio
EMIRR
V
RF_PEAK
= 100mV
f = 900MHz
f = 1800MHz
f = 2400MHz
0.7
400
-100
75
78
80
90
dB
nV/√Hz
nV
P-P
pA/√Hz
MHz
V/Fs
pF
dB
mV
150
dB
mA
300
CONDITIONS
MIN
TYP
150
MAX
300
700
600
1400
UNITS
pA
pA
Open-Loop Gain (Note 3)
Output Short-Circuit Current
A
VOL
To V
DD
or V
SS
, noncontinuous
V
DD
-
V
OUT
V
OUT
-
V
SS
e
N
i
N
GBW
SR
C
L
THD+N
T
A
= +25NC
-40NC < T
A
< +125NC
T
A
= +25NC
-40NC < T
A
< +125NC
f = 1kHz
0.1Hz < f < 10Hz
f = 1kHz
Output Voltage Swing
AC SPECIFICATIONS
Input Voltage-Noise Density
Input Voltage Noise
Input Current-Noise Density
Gain-Bandwidth Product
Slew Rate
Capacitive Loading
Total Harmonic Distortion Plus
Noise
ELECTRICAL CHARACTERISTICS
(V
DD
= 30V,
V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, R
L
= 5kI to V
DD
/2, T
A
= -40NC to +125NC, unless otherwise noted. Typical values are
at +25NC.) (Note 2)
PARAMETER
POWER SUPPLY
Quiescent Current per Amplifier
DC SPECIFICATIONS
Input Common-Mode Range
V
CM
Guaranteed by CMRR test
V
SS
-
0.05
V
DD
-
1.5
V
I
DD
T
A
= +25NC
-40NC < T
A
< +125NC
90
130
145
FA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Maxim Integrated
3
MAX44244/MAX44245/MAX44248
36V, Precision, Low-Power, 90µA,
Single/Quad/Dual Op Amps
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= 30V,
V
SS
= 0V, V
IN+
= V
IN-
= V
DD
/2, R
L
= 5kI to V
DD
/2, T
A
= -40NC to +125NC, unless otherwise noted. Typical values are
at +25NC.) (Note 2)
PARAMETER
Common-Mode Rejection Ratio
(Note 3)
SYMBOL
CONDITIONS
T
A
= +25NC, V
CM
= V
SS
- 0.05V to V
DD
-
1.5V
-40NC < T
A
< +125NC, V
CM
= V
SS
- 0.05V
to V
DD
- 1.5V
T
A
= +25NC
-40NC < T
A
< +125NC
10
T
A
= +25NC
-40NC < T
A
< +125NC
T
A
= +25NC
-40NC < T
A
< +125NC
V
SS
+ 0.5V
P
V
OUT
P
V
DD
- 0.5V
T
A
= +25NC
-40NC < T
A
< +125NC
T
A
= +25NC
-40NC < T
A
< +125NC
f = 1kHz
0.1Hz < f < 10Hz
i
N
GBW
SR
C
L
THD+N
A
V
= 1V/V, V
OUT
= 2V
P-P
No sustained oscillation, A
V
= 1V/V
V
OUT
= 2V
P-P
, A
V
= +1V/V, f = 1kHz
f = 400MHz
EMI Rejection Ratio
EMIRR
V
RF_PEAK
=
100mV
f = 900MHz
f = 1800MHz
f = 2400MHz
f = 1kHz
50
500
0.1
1
0.7
400
-100
75
78
80
90
dB
T
A
= +25NC
-40NC < T
A
< +125NC
146
140
40
200
270
140
220
nV/√Hz
nV
P-P
pA/√Hz
MHz
V/Fs
pF
dB
mV
150
300
150
MIN
130
126
2
7.5
10
30
300
700
600
1400
FV
nV/°C
pA
pA
dB
mA
TYP
140
dB
MAX
UNITS
CMRR
Input Offset Voltage (Note 3)
Input Offset Voltage Drift
(Note 3)
Input Bias Current (Note 3)
Input Offset Current (Note 3)
Open-Loop Gain (Note 3)
Output Short-Circuit Current
V
OS
TC V
OS
I
B
I
OS
A
VOL
To V
DD
or V
SS
, noncontinuous
V
DD
-
V
OUT
V
OUT
-
V
SS
e
N
Output Voltage Swing
AC SPECIFICATIONS
Input Voltage-Noise Density
Input Voltage Noise
Input Current-Noise Density
Gain-Bandwidth Product
Slew Rate
Capacitive Loading
Total Harmonic Distortion Plus
Noise
Note 2:
All devices are 100% production tested at T
A
= +25NC. Temperature limits are guaranteed by design.
Logic analyzers are widely used tools in digital design verification and debugging. They can verify the proper functioning of digital circuits and help users identify and troubleshoot faults. They ...[详细]
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