CY7C1019DV33
1-Mbit (128 K × 8) Static RAM
1-Mbit (128 K × 8) Static RAM
Features
■
■
Functional Description
The CY7C1019DV33 is a high-performance CMOS static RAM
organized as 131,072 words by 8 bits. Easy memory expansion
is provided by an active LOW Chip Enable (CE), an active LOW
Output Enable (OE), and three-state drivers. This device has an
automatic power-down feature that significantly reduces power
consumption when deselected.
Writing to the device is accomplished by taking Chip Enable (CE)
and Write Enable (WE) inputs LOW. Data on the eight I/O pins
(I/O
0
through I/O
7
) is then written into the location specified on
the address pins (A
0
through A
16
).
Reading from the device is accomplished by taking Chip Enable
(CE) and Output Enable (OE) LOW while forcing Write Enable
(WE) HIGH. Under these conditions, the contents of the memory
location specified by the address pins will appear on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE HIGH),
the outputs are disabled (OE HIGH), or during a write operation
(CE LOW, and WE LOW).
The CY7C1019DV33 is available in Pb-free 32-pin 400-Mil wide
Molded SOJ, 32-pin TSOP II and 48-ball VFBGA packages.
Pin- and function-compatible with CY7C1019CV33
High speed
❐
t
AA
= 10 ns
Low Active Power
❐
I
CC
= 60 mA @ 10 ns
Low CMOS Standby Power
❐
I
SB2
= 3 mA
2.0 V Data retention
Automatic power-down when deselected
CMOS for optimum speed/power
Center power/ground pinout
Easy memory expansion with CE and OE options
Available in Pb-free 32-pin 400-Mil wide Molded SOJ, 32-pin
TSOP II and 48-ball VFBGA packages
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■
■
■
■
■
■
■
Logic Block Diagram
INPUTBUFFER
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
CE
WE
OE
A
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
ROW DECODER
I/O
0
I/O
1
SENSE AMPS
I/O
2
I/O
3
I/O
4
I/O
5
128K × 8
ARRAY
COLUMN
DECODER
POWER
DOWN
I/O
6
I/O
7
Cypress Semiconductor Corporation
Document Number: 38-05481 Rev. *F
•
198 Champion Court
•
San Jose
,
CA 95134-1709
•
408-943-2600
Revised October 20, 2011
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CY7C1019DV33
Contents
Selection Guide ................................................................ 3
Pin Configurations ........................................................... 3
Maximum Ratings ............................................................. 4
Operating Range ............................................................... 4
Electrical Characteristics ................................................. 4
Capacitance ...................................................................... 5
Thermal Resistance .......................................................... 5
AC Test Loads and Waveforms ....................................... 5
Switching Characteristics ................................................ 6
Data Retention Characteristics ....................................... 7
Data Retention Waveform ................................................ 7
Switching Waveforms ...................................................... 7
Truth Table ...................................................................... 10
Ordering Information ...................................................... 11
Ordering Code Definitions ......................................... 11
Package Diagrams .......................................................... 12
Acronyms ........................................................................ 14
Document Conventions ................................................. 14
Units of Measure ....................................................... 14
Document History Page ................................................. 15
Sales, Solutions, and Legal Information ...................... 16
Worldwide Sales and Design Support ....................... 16
Products .................................................................... 16
PSoC Solutions ......................................................... 16
Document Number: 38-05481 Rev. *F
Page 2 of 16
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CY7C1019DV33
Selection Guide
-10 (Industrial)
Maximum Access Time
Maximum Operating Current
Maximum Standby Current
10
60
3
Unit
ns
mA
mA
Pin Configurations
Figure 1. 48-ball VFBGA (6 × 8 × 1 mm) (Top View)
[1]
1
NC
I/O
0
I/O
1
V
SS
V
CC
I/O
2
I/O
3
NC
2
OE
NC
NC
NC
NC
NC
NC
A
10
3
A
2
A
1
A
0
NC
NC
A
14
A
15
A
16
4
A
6
A
5
A
4
A
3
NC
A
11
A
12
A
13
5
A
7
CE
NC
NC
NC
I/O
4
WE
A
9
6
NC
I/O
7
I/O
6
V
CC
V
SS
I/O
5
A
8
NC
A
B
C
D
E
F
G
H
A
0
A
1
A
2
A
3
CE
I/O
0
I/O
1
V
CC
V
SS
I/O
2
I/O
3
WE
A
4
A
5
A
6
A
7
SOJ/TSOPI
Top View
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
Figure 2. 32-pin SOJ / TSOP II (Top View)
A
2
A
1
A
0
NC
NC
A
14
A
15
A
16
A
6
A
5
A
4
A
3
NC
A
11
A
12
A
13
A
7
CE
NC
NC
NC
I/O
4
WE
A
9
NC
I/O
7
I/O
6
V
CC
V
SS
I/O
5
A
8
NC
A
B
C
D
E
F
G
H
A
0
A
1
A
2
A
3
CE
I/O
0
I/O
1
V
CC
V
SS
I/O
2
I/O
3
WE
A
4
A
5
A
6
A
7
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A
16
A
15
A
14
A
13
OE
I/O
7
I/O
6
V
SS
V
CC
I/O
5
I/O
4
A
12
A
11
A
10
A
9
A
8
Note
1. NC pins are not connected on the die.
Document Number: 38-05481 Rev. *F
Page 3 of 16
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CY7C1019DV33
Maximum Ratings
Exceeding maximum ratings may impair the useful life of the
device. These user guidelines are not tested.
Storage Temperature ............................... –65
C
to +150
C
Ambient Temperature with
Power Applied ......................................... –55
C
to +125
C
Supply Voltage on
V
CC
to Relative GND
[2]
...............................–0.3 V to +4.6 V
DC Voltage Applied to Outputs
in High Z State
[2]
................................ –0.3 V to V
CC
+ 0.3 V
DC Input Voltage
[2]
............................ –0.3 V to V
CC
+ 0.3 V
Current into Outputs (LOW) ........................................ 20 mA
Static Discharge Voltage
(per MIL-STD-883, Method 3015) .......................... > 2001 V
Latch-up Current .................................................... > 200 mA
Operating Range
Range
Industrial
Ambient Temperature
–40
C
to +85
C
V
CC
3.3 V
0.3 V
Speed
10 ns
Electrical Characteristics
Over the Operating Range
Parameter
V
OH
V
OL
V
IH
V
IL
I
IX
I
OZ
I
CC
Description
Output HIGH voltage
Output LOW voltage
Input HIGH voltage
Input LOW voltage
[2]
Input leakage current
Output leakage current
V
CC
operating supply current
GND < V
IN
< V
CC
GND < V
IN
< V
CC
, output disabled
V
CC
= Max, I
OUT
= 0 mA,
f = f
MAX
= 1/t
RC
100 MHz
83 MHz
66 MHz
40 MHz
I
SB1
I
SB2
Automatic CE power-down
current – TTL inputs
Automatic CE power-down
current – CMOS inputs
Max V
CC
, CE > V
IH
,
V
IN
> V
IH
or V
IN
< V
IL
, f = f
MAX
Max V
CC
, CE > V
CC
– 0.3 V,
V
IN
> V
CC
– 0.3 V or V
IN
< 0.3 V, f = 0
Test Conditions
Min V
CC
, I
OH
= –4.0 mA
Min V
CC
, I
OL
= 8.0 mA
-10 (Industrial)
Min
2.4
–
2.0
–0.3
–1
–1
–
–
–
–
–
–
Max
–
0.4
V
CC
+ 0.3
0.8
+1
+1
60
55
45
30
10
3
Unit
V
V
V
V
A
A
mA
mA
mA
mA
mA
mA
Note
2. V
IL(min)
= –2.0 V and V
IH(max)
= V
CC
+ 1 V for pulse durations of less than 5 ns.
Document Number: 38-05481 Rev. *F
Page 4 of 16
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CY7C1019DV33
Capacitance
Parameter
[3]
C
IN
C
OUT
Description
Input Capacitance
Output Capacitance
Test Conditions
T
A
= 25 °C, f = 1 MHz, V
CC
= 3.3 V
Max
8
8
Unit
pF
pF
Thermal Resistance
Parameter
[3]
JA
JC
Description
Thermal Resistance
(Junction to Ambient)
Thermal Resistance
(Junction to Case)
Test Conditions
Still Air, soldered on a 3 × 4.5
inch, four-layer printed circuit
board
32-pin SOJ
56.29
38.14
32-pin TSOP II 48-ball VFBGA Unit
62.22
21.43
36
9
C/W
C/W
AC Test Loads and Waveforms
Figure 3. AC Test Loads and Waveforms
[4]
ALL INPUT PULSES
90%
10%
90%
10%
Z = 50
OUTPUT
50
* CAPACITIVE LOAD CONSISTS
OF ALL COMPONENTS OF THE
TEST ENVIRONMENT
1.5V
3.0 V
GND
Rise Time: 1 V/ns
30 pF*
(a)
(b)
Fall Time: 1 V/ns
High-Z characteristics:
R1 317
3.3 V
OUTPUT
5 pF
R2
351
(c)
Notes
3. Tested initially and after any design or process changes that may affect these parameters.
4. AC characteristics (except High Z) are tested using the load conditions shown in
Figure 3
(a). High Z characteristics are tested for all speeds using the test load shown
in
Figure 3
(c).
Document Number: 38-05481 Rev. *F
Page 5 of 16
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